Commit 0d3a1b37 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-5.14-2021-07-01' of... 

Merge tag 'amd-drm-next-5.14-2021-07-01' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-next

amd-drm-next-5.14-2021-07-01:

amdgpu:
- Misc Navi fixes
- Powergating fix
- Yellow Carp updates
- Beige Goby updates
- S0ix fix
- Revert overlay validation fix
- GPU reset fix for DC
- PPC64 fix
- Add new dimgrey cavefish DID
- RAS fix

amdkfd:
- SVM fixes

radeon:
- Fix missing drm_gem_object_put in error path

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210701042241.25449-1-alexander.deucher@amd.com
parents 8a02ea42 93c5bcd4

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+37 −0
Original line number Diff line number Diff line
@@ -1369,6 +1369,38 @@ static void amdgpu_device_check_smu_prv_buffer_size(struct amdgpu_device *adev) 
	adev->pm.smu_prv_buffer_size = 0;

}



static int amdgpu_device_init_apu_flags(struct amdgpu_device *adev)

{

	if (!(adev->flags & AMD_IS_APU) ||

	    adev->asic_type < CHIP_RAVEN)

		return 0;



	switch (adev->asic_type) {

	case CHIP_RAVEN:

		if (adev->pdev->device == 0x15dd)

			adev->apu_flags |= AMD_APU_IS_RAVEN;

		if (adev->pdev->device == 0x15d8)

			adev->apu_flags |= AMD_APU_IS_PICASSO;

		break;

	case CHIP_RENOIR:

		if ((adev->pdev->device == 0x1636) ||

		    (adev->pdev->device == 0x164c))

			adev->apu_flags |= AMD_APU_IS_RENOIR;

		else

			adev->apu_flags |= AMD_APU_IS_GREEN_SARDINE;

		break;

	case CHIP_VANGOGH:

		adev->apu_flags |= AMD_APU_IS_VANGOGH;

		break;

	case CHIP_YELLOW_CARP:

		break;

	default:

		return -EINVAL;

	}



	return 0;

}



/**

 * amdgpu_device_check_arguments - validate module params

 *
@@ -3386,6 +3418,10 @@ int amdgpu_device_init(struct amdgpu_device *adev, 
	mutex_init(&adev->psp.mutex);

	mutex_init(&adev->notifier_lock);



	r = amdgpu_device_init_apu_flags(adev);

	if (r)

		return r;



	r = amdgpu_device_check_arguments(adev);

	if (r)

		return r;
@@ -4304,6 +4340,7 @@ bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev) 
		case CHIP_SIENNA_CICHLID:

		case CHIP_NAVY_FLOUNDER:

		case CHIP_DIMGREY_CAVEFISH:

		case CHIP_BEIGE_GOBY:

		case CHIP_VANGOGH:

		case CHIP_ALDEBARAN:

			break;

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+2 −0
Original line number Diff line number Diff line
@@ -160,6 +160,7 @@ int amdgpu_smu_pptable_id = -1; 
 *     highest. That helps saving some idle power.

 * DISABLE_FRACTIONAL_PWM (bit 2) disabled by default

 * PSR (bit 3) disabled by default

 * EDP NO POWER SEQUENCING (bit 4) disabled by default

 */

uint amdgpu_dc_feature_mask = 2;

uint amdgpu_dc_debug_mask;
@@ -1198,6 +1199,7 @@ static const struct pci_device_id pciidlist[] = { 
	{0x1002, 0x73E0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73E2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73E3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},



	/* Aldebaran */

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

+1 −0
Original line number Diff line number Diff line
@@ -562,6 +562,7 @@ void amdgpu_gmc_tmz_set(struct amdgpu_device *adev) 
	case CHIP_NAVI14:

	case CHIP_NAVI12:

	case CHIP_VANGOGH:

	case CHIP_YELLOW_CARP:

		/* Don't enable it by default yet.

		 */

		if (amdgpu_tmz < 1) {

drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c

+2 −1
Original line number Diff line number Diff line
@@ -160,7 +160,7 @@ int amdgpu_hmm_range_get_pages(struct mmu_interval_notifier *notifier, 
			       struct mm_struct *mm, struct page **pages,

			       uint64_t start, uint64_t npages,

			       struct hmm_range **phmm_range, bool readonly,

			       bool mmap_locked)

			       bool mmap_locked, void *owner)

{

	struct hmm_range *hmm_range;

	unsigned long timeout;
@@ -185,6 +185,7 @@ int amdgpu_hmm_range_get_pages(struct mmu_interval_notifier *notifier, 
	hmm_range->hmm_pfns = pfns;

	hmm_range->start = start;

	hmm_range->end = start + npages * PAGE_SIZE;

	hmm_range->dev_private_owner = owner;



	/* Assuming 512MB takes maxmium 1 second to fault page address */

	timeout = max(npages >> 17, 1ULL) * HMM_RANGE_DEFAULT_TIMEOUT;

drivers/gpu/drm/amd/amdgpu/amdgpu_mn.h

+1 −1
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ int amdgpu_hmm_range_get_pages(struct mmu_interval_notifier *notifier, 
			       struct mm_struct *mm, struct page **pages,

			       uint64_t start, uint64_t npages,

			       struct hmm_range **phmm_range, bool readonly,

			       bool mmap_locked);

			       bool mmap_locked, void *owner);

int amdgpu_hmm_range_get_pages_done(struct hmm_range *hmm_range);



#if defined(CONFIG_HMM_MIRROR)