Commit 0d1503d8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'devicetree-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree fixes from Rob Herring:

 - Two fixes due to DT node name changes on Arm, Ltd. boards

 - Treewide rename of Ingenic CGU headers

 - Update ST email addresses

 - Remove Netlogic DT bindings

 - Dropping few more cases of redundant 'maxItems' in schemas

 - Convert toshiba,tc358767 bridge binding to schema

* tag 'devicetree-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  dt-bindings: watchdog: sunxi: fix error in schema
  bindings: media: venus: Drop redundant maxItems for power-domain-names
  dt-bindings: Remove Netlogic bindings
  clk: versatile: clk-icst: Ensure clock names are unique
  of: Support using 'mask' in making device bus id
  dt-bindings: treewide: Update @st.com email address to @foss.st.com
  dt-bindings: media: Update maintainers for st,stm32-hwspinlock.yaml
  dt-bindings: media: Update maintainers for st,stm32-cec.yaml
  dt-bindings: mfd: timers: Update maintainers for st,stm32-timers
  dt-bindings: timer: Update maintainers for st,stm32-timer
  dt-bindings: i2c: imx: hardware do not restrict clock-frequency to only 100 and 400 kHz
  dt-bindings: display: bridge: Convert toshiba,tc358767.txt to yaml
  dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
parents 622c72b6 913d3a3f
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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: ST STi Platforms Device Tree Bindings

maintainers:
  - Patrice Chotard <patrice.chotard@st.com>
  - Patrice Chotard <patrice.chotard@foss.st.com>

properties:
  $nodename:
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@@ -7,8 +7,8 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: STMicroelectronics STM32 ML-AHB interconnect bindings

maintainers:
  - Fabien Dessenne <fabien.dessenne@st.com>
  - Arnaud Pouliquen <arnaud.pouliquen@st.com>
  - Fabien Dessenne <fabien.dessenne@foss.st.com>
  - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>

description: |
  These bindings describe the STM32 SoCs ML-AHB interconnect bus which connects
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@@ -7,8 +7,8 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: STMicroelectronics STM32 Platforms System Controller bindings

maintainers:
  - Alexandre Torgue <alexandre.torgue@st.com>
  - Christophe Roullier <christophe.roullier@st.com>
  - Alexandre Torgue <alexandre.torgue@foss.st.com>
  - Christophe Roullier <christophe.roullier@foss.st.com>

properties:
  compatible:
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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Platforms Device Tree Bindings

maintainers:
  - Alexandre Torgue <alexandre.torgue@st.com>
  - Alexandre Torgue <alexandre.torgue@foss.st.com>

properties:
  $nodename:
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@@ -104,7 +104,7 @@ additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/jz4770-cgu.h>
    #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
    cgu: clock-controller@10000000 {
      compatible = "ingenic,jz4770-cgu", "simple-mfd";
      reg = <0x10000000 0x100>;
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