Commit 0ca6e30e authored by Pali Rohár's avatar Pali Rohár Committed by Linus Walleij
Browse files

pinctrl: armada-37xx: Add missing GPIO-only pins 



gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
so they are properly exported as valid pin numbers.

Fixes: 87466ccd ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20220805122202.23174-1-pali@kernel.org


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent fd4ea486

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

+12 −0
Original line number Diff line number Diff line
@@ -122,6 +122,16 @@ struct armada_37xx_pinctrl { 
		.funcs = {_func1, _func2}	\

	}



#define PIN_GRP_GPIO_0(_name, _start, _nr)	\

	{					\

		.name = _name,			\

		.start_pin = _start,		\

		.npins = _nr,			\

		.reg_mask = 0,			\

		.val = {0},			\

		.funcs = {"gpio"}		\

	}



#define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1)	\

	{					\

		.name = _name,			\
@@ -179,6 +189,7 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { 
		       "pwm", "led"),

	PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"),

	PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"),

	PIN_GRP_GPIO_0("gpio1_5", 5, 1),

	PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),

	PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),

	PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
@@ -195,6 +206,7 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { 
static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {

	PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"),

	PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"),

	PIN_GRP_GPIO_0("gpio2_2", 2, 1),

	PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"),

	PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"),

	PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"),