Commit 0c8fb653 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/64s: Remove WORT SPR from POWER9/10 



This register is not architected and not implemented in POWER9 or 10,
it just reads back zeroes for compatibility.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Reviewed-by: default avatarFabiano Rosas <farosas@linux.ibm.com>
Link: https://lore.kernel.org/r/20210811160134.904987-11-npiggin@gmail.com
parent 17826638

arch/powerpc/kvm/book3s_hv.c

+0 −3
Original line number Original line Diff line number Diff line
@@ -3767,7 +3767,6 @@ static void load_spr_state(struct kvm_vcpu *vcpu) 
	mtspr(SPRN_EBBHR, vcpu->arch.ebbhr);

	mtspr(SPRN_EBBHR, vcpu->arch.ebbhr);

	mtspr(SPRN_EBBRR, vcpu->arch.ebbrr);

	mtspr(SPRN_EBBRR, vcpu->arch.ebbrr);

	mtspr(SPRN_BESCR, vcpu->arch.bescr);

	mtspr(SPRN_BESCR, vcpu->arch.bescr);

	mtspr(SPRN_WORT, vcpu->arch.wort);

	mtspr(SPRN_TIDR, vcpu->arch.tid);

	mtspr(SPRN_TIDR, vcpu->arch.tid);

	mtspr(SPRN_AMR, vcpu->arch.amr);

	mtspr(SPRN_AMR, vcpu->arch.amr);

	mtspr(SPRN_UAMOR, vcpu->arch.uamor);

	mtspr(SPRN_UAMOR, vcpu->arch.uamor);
@@ -3794,7 +3793,6 @@ static void store_spr_state(struct kvm_vcpu *vcpu) 
	vcpu->arch.ebbhr = mfspr(SPRN_EBBHR);

	vcpu->arch.ebbhr = mfspr(SPRN_EBBHR);

	vcpu->arch.ebbrr = mfspr(SPRN_EBBRR);

	vcpu->arch.ebbrr = mfspr(SPRN_EBBRR);

	vcpu->arch.bescr = mfspr(SPRN_BESCR);

	vcpu->arch.bescr = mfspr(SPRN_BESCR);

	vcpu->arch.wort = mfspr(SPRN_WORT);

	vcpu->arch.tid = mfspr(SPRN_TIDR);

	vcpu->arch.tid = mfspr(SPRN_TIDR);

	vcpu->arch.amr = mfspr(SPRN_AMR);

	vcpu->arch.amr = mfspr(SPRN_AMR);

	vcpu->arch.uamor = mfspr(SPRN_UAMOR);

	vcpu->arch.uamor = mfspr(SPRN_UAMOR);
@@ -3826,7 +3824,6 @@ static void restore_p9_host_os_sprs(struct kvm_vcpu *vcpu, 
				    struct p9_host_os_sprs *host_os_sprs)

				    struct p9_host_os_sprs *host_os_sprs)

{

{

	mtspr(SPRN_PSPB, 0);

	mtspr(SPRN_PSPB, 0);

	mtspr(SPRN_WORT, 0);

	mtspr(SPRN_UAMOR, 0);

	mtspr(SPRN_UAMOR, 0);





	mtspr(SPRN_DSCR, host_os_sprs->dscr);

	mtspr(SPRN_DSCR, host_os_sprs->dscr);

arch/powerpc/platforms/powernv/idle.c

+0 −2
Original line number Original line Diff line number Diff line
@@ -667,7 +667,6 @@ static unsigned long power9_idle_stop(unsigned long psscr) 
		sprs.purr	= mfspr(SPRN_PURR);

		sprs.purr	= mfspr(SPRN_PURR);

		sprs.spurr	= mfspr(SPRN_SPURR);

		sprs.spurr	= mfspr(SPRN_SPURR);

		sprs.dscr	= mfspr(SPRN_DSCR);

		sprs.dscr	= mfspr(SPRN_DSCR);

		sprs.wort	= mfspr(SPRN_WORT);

		sprs.ciabr	= mfspr(SPRN_CIABR);

		sprs.ciabr	= mfspr(SPRN_CIABR);





		sprs.mmcra	= mfspr(SPRN_MMCRA);

		sprs.mmcra	= mfspr(SPRN_MMCRA);
@@ -785,7 +784,6 @@ static unsigned long power9_idle_stop(unsigned long psscr) 
	mtspr(SPRN_PURR,	sprs.purr);

	mtspr(SPRN_PURR,	sprs.purr);

	mtspr(SPRN_SPURR,	sprs.spurr);

	mtspr(SPRN_SPURR,	sprs.spurr);

	mtspr(SPRN_DSCR,	sprs.dscr);

	mtspr(SPRN_DSCR,	sprs.dscr);

	mtspr(SPRN_WORT,	sprs.wort);

	mtspr(SPRN_CIABR,	sprs.ciabr);

	mtspr(SPRN_CIABR,	sprs.ciabr);





	mtspr(SPRN_MMCRA,	sprs.mmcra);

	mtspr(SPRN_MMCRA,	sprs.mmcra);