Commit 0c8d22fc authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-5.10-2020-09-03' of git://people.freedesktop.org/~agd5f/linux into drm-next 

amd-drm-next-5.10-2020-09-03:

amdgpu:
- RAS fixes
- Sienna Cichlid updates
- Navy Flounder updates
- DCE6 (SI) support in DC
- Enable plane rotation
- Rework pre-OS vram reservation handling during driver init
- Add standard interface to dump GPU metrics table from SMU
- Rework tiling and tmz state handling in atomic commits
- Pstate fixes
- Add voltage and power hwmon interfaces for renoir
- SW CTF fixes
- S/G display fix for Raven
- Print client strings for vmfaults for vega and newer
- Manual fan control fixes
- Display updates
- Reorg power management directory structure
- Misc bug fixes
- Misc code cleanups

amdkfd:
- Topology fixes
- Add SMI events for thermal throttling and GPU resets

radeon:
- switch from pci_* to dma_* for dma allocations
- PLL fix

Scheduler:
- Clean up priority levels

UAPI:
- amdgpu INFO IOCTL query update for TMZ state
  https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049
- amdkfd SMI event interface updates
  https://github.com/RadeonOpenCompute/rocm_smi_lib/tree/therm_thrott

From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200903222921.4152-1-alexander.deucher@amd.com
parents ce5c207c 11bc98bd

Documentation/gpu/amdgpu.rst

+17 −11
Original line number Diff line number Diff line
@@ -153,7 +153,7 @@ This section covers hwmon and power/thermal controls. 
HWMON Interfaces

----------------



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: hwmon



GPU sysfs Power State Interfaces
@@ -164,48 +164,54 @@ GPU power controls are exposed via sysfs files. 
power_dpm_state

~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: power_dpm_state



power_dpm_force_performance_level

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: power_dpm_force_performance_level



pp_table

~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: pp_table



pp_od_clk_voltage

~~~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: pp_od_clk_voltage



pp_dpm_*

~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: pp_dpm_sclk pp_dpm_mclk pp_dpm_socclk pp_dpm_fclk pp_dpm_dcefclk pp_dpm_pcie



pp_power_profile_mode

~~~~~~~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: pp_power_profile_mode



*_busy_percent

~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: gpu_busy_percent



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: mem_busy_percent



gpu_metrics

~~~~~~~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: gpu_metrics



GPU Product Information

=======================
@@ -233,7 +239,7 @@ serial_number 
unique_id

---------



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: unique_id



GPU Memory Usage Information
@@ -283,7 +289,7 @@ PCIe Accounting Information 
pcie_bw

-------



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c

   :doc: pcie_bw



pcie_replay_count

drivers/gpu/drm/amd/amdgpu/Makefile

+7 −11
Original line number Diff line number Diff line
@@ -30,7 +30,7 @@ FULL_AMD_DISPLAY_PATH = $(FULL_AMD_PATH)/$(DISPLAY_FOLDER_NAME) 
ccflags-y := -I$(FULL_AMD_PATH)/include/asic_reg \

	-I$(FULL_AMD_PATH)/include \

	-I$(FULL_AMD_PATH)/amdgpu \

	-I$(FULL_AMD_PATH)/powerplay/inc \

	-I$(FULL_AMD_PATH)/pm/inc \

	-I$(FULL_AMD_PATH)/acp/include \

	-I$(FULL_AMD_DISPLAY_PATH) \

	-I$(FULL_AMD_DISPLAY_PATH)/include \
@@ -47,7 +47,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ 
	amdgpu_encoders.o amdgpu_display.o amdgpu_i2c.o \

	amdgpu_fb.o amdgpu_gem.o amdgpu_ring.o \

	amdgpu_cs.o amdgpu_bios.o amdgpu_benchmark.o amdgpu_test.o \

	amdgpu_pm.o atombios_dp.o amdgpu_afmt.o amdgpu_trace_points.o \

	atombios_dp.o amdgpu_afmt.o amdgpu_trace_points.o \

	atombios_encoders.o amdgpu_sa.o atombios_i2c.o \

	amdgpu_dma_buf.o amdgpu_vm.o amdgpu_ib.o amdgpu_pll.o \

	amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \
@@ -55,15 +55,15 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ 
	amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \

	amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \

	amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \

	amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o

	amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o



amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o



# add asic specific block

amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \

amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o \

	dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o



amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o \

amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o \

	uvd_v3_1.o



amdgpu-y += \
@@ -85,7 +85,7 @@ amdgpu-y += \ 


# add UMC block

amdgpu-y += \

	umc_v6_1.o umc_v6_0.o

	umc_v6_1.o umc_v6_0.o umc_v8_7.o



# add IH block

amdgpu-y += \
@@ -105,10 +105,6 @@ amdgpu-y += \ 
	psp_v11_0.o \

	psp_v12_0.o



# add SMC block

amdgpu-y += \

	amdgpu_dpm.o



# add DCE block

amdgpu-y += \

	dce_v10_0.o \
@@ -212,7 +208,7 @@ amdgpu-$(CONFIG_VGA_SWITCHEROO) += amdgpu_atpx_handler.o 
amdgpu-$(CONFIG_ACPI) += amdgpu_acpi.o

amdgpu-$(CONFIG_HMM_MIRROR) += amdgpu_mn.o



include $(FULL_AMD_PATH)/powerplay/Makefile

include $(FULL_AMD_PATH)/pm/Makefile



amdgpu-y += $(AMD_POWERPLAY_FILES)

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+31 −25
Original line number Diff line number Diff line
@@ -178,6 +178,7 @@ extern uint amdgpu_dm_abm_level; 
extern struct amdgpu_mgpu_info mgpu_info;

extern int amdgpu_ras_enable;

extern uint amdgpu_ras_mask;

extern int amdgpu_bad_page_threshold;

extern int amdgpu_async_gfx_ring;

extern int amdgpu_mcbp;

extern int amdgpu_discovery;
@@ -187,9 +188,11 @@ extern int amdgpu_force_asic_type; 
#ifdef CONFIG_HSA_AMD

extern int sched_policy;

extern bool debug_evictions;

extern bool no_system_mem_limit;

#else

static const int sched_policy = KFD_SCHED_POLICY_HWS;

static const bool debug_evictions; /* = false */

static const bool no_system_mem_limit;

#endif



extern int amdgpu_tmz;
@@ -201,6 +204,7 @@ extern int amdgpu_si_support; 
#ifdef CONFIG_DRM_AMDGPU_CIK

extern int amdgpu_cik_support;

#endif

extern int amdgpu_num_kcq;



#define AMDGPU_VM_MAX_NUM_CTX			4096

#define AMDGPU_SG_THRESHOLD			(256*1024*1024)
@@ -212,6 +216,8 @@ extern int amdgpu_cik_support; 
#define AMDGPUFB_CONN_LIMIT			4

#define AMDGPU_BIOS_NUM_SCRATCH			16



#define AMDGPU_VBIOS_VGA_ALLOCATION		(9 * 1024 * 1024) /* reserve 8MB for vga emulator and 1 MB for FB */



/* hard reset data */

#define AMDGPU_ASIC_RESET_DATA                  0x39d5e86b
@@ -245,6 +251,7 @@ struct amdgpu_fpriv; 
struct amdgpu_bo_va_mapping;

struct amdgpu_atif;

struct kfd_vm_fault_info;

struct amdgpu_hive_info;



enum amdgpu_cp_irq {

	AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP = 0,
@@ -611,6 +618,8 @@ struct amdgpu_asic_funcs { 
	uint64_t (*get_pcie_replay_count)(struct amdgpu_device *adev);

	/* device supports BACO */

	bool (*supports_baco)(struct amdgpu_device *adev);

	/* pre asic_init quirks */

	void (*pre_asic_init)(struct amdgpu_device *adev);

};



/*
@@ -647,16 +656,6 @@ struct amdgpu_atcs { 
	struct amdgpu_atcs_functions functions;

};



/*

 * Firmware VRAM reservation

 */

struct amdgpu_fw_vram_usage {

	u64 start_offset;

	u64 size;

	struct amdgpu_bo *reserved_bo;

	void *va;

};



/*

 * CGS

 */
@@ -725,13 +724,13 @@ struct amd_powerplay { 
#define AMDGPU_MAX_DF_PERFMONS 4

struct amdgpu_device {

	struct device			*dev;

	struct drm_device		*ddev;

	struct pci_dev			*pdev;

	struct drm_device		ddev;



#ifdef CONFIG_DRM_AMD_ACP

	struct amdgpu_acp		acp;

#endif



	struct amdgpu_hive_info *hive;

	/* ASIC */

	enum amd_asic_type		asic_type;

	uint32_t			family;
@@ -765,7 +764,6 @@ struct amdgpu_device { 
	bool				is_atom_fw;

	uint8_t				*bios;

	uint32_t			bios_size;

	struct amdgpu_bo		*stolen_vga_memory;

	uint32_t			bios_scratch_reg_offset;

	uint32_t			bios_scratch[AMDGPU_BIOS_NUM_SCRATCH];
@@ -917,11 +915,6 @@ struct amdgpu_device { 
	/* display related functionality */

	struct amdgpu_display_manager dm;



	/* discovery */

	uint8_t				*discovery_bin;

	uint32_t			discovery_tmr_size;

	struct amdgpu_bo		*discovery_memory;



	/* mes */

	bool                            enable_mes;

	struct amdgpu_mes               mes;
@@ -946,8 +939,6 @@ struct amdgpu_device { 
	struct delayed_work     delayed_init_work;



	struct amdgpu_virt	virt;

	/* firmware VRAM reservation */

	struct amdgpu_fw_vram_usage fw_vram_usage;



	/* link all shadow bo */

	struct list_head                shadow_list;
@@ -961,9 +952,9 @@ struct amdgpu_device { 
	bool                            in_suspend;

	bool				in_hibernate;



	bool                            in_gpu_reset;

	atomic_t 			in_gpu_reset;

	enum pp_mp1_state               mp1_state;

	struct mutex  lock_reset;

	struct rw_semaphore reset_sem;

	struct amdgpu_doorbell_index doorbell_index;



	struct mutex			notifier_lock;
@@ -995,16 +986,25 @@ struct amdgpu_device { 


	atomic_t			throttling_logging_enabled;

	struct ratelimit_state		throttling_logging_rs;

	uint32_t			ras_features;

};



static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)

{

	return container_of(ddev, struct amdgpu_device, ddev);

}



static inline struct drm_device *adev_to_drm(struct amdgpu_device *adev)

{

	return &adev->ddev;

}



static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)

{

	return container_of(bdev, struct amdgpu_device, mman.bdev);

}



int amdgpu_device_init(struct amdgpu_device *adev,

		       struct drm_device *ddev,

		       struct pci_dev *pdev,

		       uint32_t flags);

void amdgpu_device_fini(struct amdgpu_device *adev);

int amdgpu_gpu_wait_for_idle(struct amdgpu_device *adev);
@@ -1141,10 +1141,12 @@ int emu_soc_asic_init(struct amdgpu_device *adev); 
#define amdgpu_asic_need_reset_on_init(adev) (adev)->asic_funcs->need_reset_on_init((adev))

#define amdgpu_asic_get_pcie_replay_count(adev) ((adev)->asic_funcs->get_pcie_replay_count((adev)))

#define amdgpu_asic_supports_baco(adev) (adev)->asic_funcs->supports_baco((adev))

#define amdgpu_asic_pre_asic_init(adev) (adev)->asic_funcs->pre_asic_init((adev))



#define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));



/* Common functions */

bool amdgpu_device_has_job_running(struct amdgpu_device *adev);

bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);

int amdgpu_device_gpu_recover(struct amdgpu_device *adev,

			      struct amdgpu_job* job);
@@ -1194,7 +1196,7 @@ static inline void *amdgpu_atpx_get_dhandle(void) { return NULL; } 
extern const struct drm_ioctl_desc amdgpu_ioctls_kms[];

extern const int amdgpu_max_kms_ioctl;



int amdgpu_driver_load_kms(struct drm_device *dev, unsigned long flags);

int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags);

void amdgpu_driver_unload_kms(struct drm_device *dev);

void amdgpu_driver_lastclose_kms(struct drm_device *dev);

int amdgpu_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
@@ -1278,4 +1280,8 @@ static inline bool amdgpu_is_tmz(struct amdgpu_device *adev) 
       return adev->gmc.tmz_enabled;

}



static inline int amdgpu_in_reset(struct amdgpu_device *adev)

{

	return atomic_read(&adev->in_gpu_reset);

}

#endif

drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c

+3 −8
Original line number Diff line number Diff line
@@ -136,8 +136,6 @@ static int acp_poweroff(struct generic_pm_domain *genpd) 
	 * 2. power off the acp tiles

	 * 3. check and enter ulv state

	 */

		if (adev->powerplay.pp_funcs &&

			adev->powerplay.pp_funcs->set_powergating_by_smu)

		amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);

	}

	return 0;
@@ -157,7 +155,6 @@ static int acp_poweron(struct generic_pm_domain *genpd) 
	 * 2. turn on acp clock

	 * 3. power on acp tiles

	 */

		if (adev->powerplay.pp_funcs->set_powergating_by_smu)

		amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);

	}

	return 0;
@@ -529,8 +526,6 @@ static int acp_set_powergating_state(void *handle, 
	struct amdgpu_device *adev = (struct amdgpu_device *)handle;

	bool enable = (state == AMD_PG_STATE_GATE);



	if (adev->powerplay.pp_funcs &&

		adev->powerplay.pp_funcs->set_powergating_by_smu)

	amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable);



	return 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c

+5 −5
Original line number Diff line number Diff line
@@ -463,11 +463,11 @@ static int amdgpu_atif_handler(struct amdgpu_device *adev, 


		if (req.pending & ATIF_DGPU_DISPLAY_EVENT) {

			if (adev->flags & AMD_IS_PX) {

				pm_runtime_get_sync(adev->ddev->dev);

				pm_runtime_get_sync(adev_to_drm(adev)->dev);

				/* Just fire off a uevent and let userspace tell us what to do */

				drm_helper_hpd_irq_event(adev->ddev);

				pm_runtime_mark_last_busy(adev->ddev->dev);

				pm_runtime_put_autosuspend(adev->ddev->dev);

				drm_helper_hpd_irq_event(adev_to_drm(adev));

				pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);

				pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);

			}

		}

		/* TODO: check other events */
@@ -817,7 +817,7 @@ int amdgpu_acpi_init(struct amdgpu_device *adev) 
			struct drm_encoder *tmp;



			/* Find the encoder controlling the brightness */

			list_for_each_entry(tmp, &adev->ddev->mode_config.encoder_list,

			list_for_each_entry(tmp, &adev_to_drm(adev)->mode_config.encoder_list,

					    head) {

				struct amdgpu_encoder *enc = to_amdgpu_encoder(tmp);