Commit 0c855563 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm-apple-m1-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM Apple M1 platform support from Arnd Bergmann:
 "The Apple M1 is the processor used it all current generation Apple
  Macintosh computers. Support for this platform so far is rudimentary,
  but it boots and can use framebuffer and serial console over a special
  USB cable.

  Support for several essential on-chip devices (USB, PCIe, IOMMU, NVMe)
  is work in progress but was not ready in time.

  A very detailed description of what works is in the commit message of
  commit 1bb2fd38 ("Merge tag 'm1-soc-bringup-v5' [..]") and on the
  AsahiLinux wiki"

Link: https://lore.kernel.org/linux-arm-kernel/bdb18e9f-fcd7-1e31-2224-19c0e5090706@marcan.st/

* tag 'arm-apple-m1-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  asm-generic/io.h: Unbork ioremap_np() declaration
  arm64: apple: Add initial Apple Mac mini (M1, 2020) devicetree
  dt-bindings: display: Add apple,simple-framebuffer
  arm64: Kconfig: Introduce CONFIG_ARCH_APPLE
  irqchip/apple-aic: Add support for the Apple Interrupt Controller
  dt-bindings: interrupt-controller: Add DT bindings for apple-aic
  arm64: Move ICH_ sysreg bits from arm-gic-v3.h to sysreg.h
  of/address: Add infrastructure to declare MMIO as non-posted
  asm-generic/io.h: implement pci_remap_cfgspace using ioremap_np
  arm64: Implement ioremap_np() to map MMIO as nGnRnE
  docs: driver-api: device-io: Document ioremap() variants & access funcs
  docs: driver-api: device-io: Document I/O access functions
  asm-generic/io.h:  Add a non-posted variant of ioremap()
  arm64: arch_timer: Implement support for interrupt-names
  dt-bindings: timer: arm,arch_timer: Add interrupt-names support
  arm64: cputype: Add CPU implementor & types for the Apple M1 cores
  dt-bindings: arm: cpus: Add apple,firestorm & icestorm compatibles
  dt-bindings: arm: apple: Add bindings for Apple ARM platforms
  dt-bindings: vendor-prefixes: Add apple prefix
parents 6b0fbc54 ea962928

Documentation/devicetree/bindings/arm/apple.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/arm/apple.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Apple ARM Machine Device Tree Bindings



maintainers:

  - Hector Martin <marcan@marcan.st>



description: |

  ARM platforms using SoCs designed by Apple Inc., branded "Apple Silicon".



  This currently includes devices based on the "M1" SoC, starting with the

  three Mac models released in late 2020:



  - Mac mini (M1, 2020)

  - MacBook Pro (13-inch, M1, 2020)

  - MacBook Air (M1, 2020)



  The compatible property should follow this format:



  compatible = "apple,<targettype>", "apple,<socid>", "apple,arm-platform";



  <targettype> represents the board/device and comes from the `target-type`

  property of the root node of the Apple Device Tree, lowercased. It can be

  queried on macOS using the following command:



  $ ioreg -d2 -l | grep target-type



  <socid> is the lowercased SoC ID. Apple uses at least *five* different

  names for their SoCs:



  - Marketing name ("M1")

  - Internal name ("H13G")

  - Codename ("Tonga")

  - SoC ID ("T8103")

  - Package/IC part number ("APL1102")



  Devicetrees should use the lowercased SoC ID, to avoid confusion if

  multiple SoCs share the same marketing name. This can be obtained from

  the `compatible` property of the arm-io node of the Apple Device Tree,

  which can be queried as follows on macOS:



  $ ioreg -n arm-io | grep compatible



properties:

  $nodename:

    const: "/"

  compatible:

    oneOf:

      - description: Apple M1 SoC based platforms

        items:

          - enum:

              - apple,j274 # Mac mini (M1, 2020)

              - apple,j293 # MacBook Pro (13-inch, M1, 2020)

              - apple,j313 # MacBook Air (M1, 2020)

          - const: apple,t8103

          - const: apple,arm-platform



additionalProperties: true



...

Documentation/devicetree/bindings/arm/cpus.yaml

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@@ -85,6 +85,8 @@ properties: 


  compatible:

    enum:

      - apple,icestorm

      - apple,firestorm

      - arm,arm710t

      - arm,arm720t

      - arm,arm740t

Documentation/devicetree/bindings/display/simple-framebuffer.yaml

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@@ -54,6 +54,7 @@ properties: 
  compatible:

    items:

      - enum:

          - apple,simple-framebuffer

          - allwinner,simple-framebuffer

          - amlogic,simple-framebuffer

      - const: simple-framebuffer
@@ -84,9 +85,13 @@ properties: 
      Format of the framebuffer:

        * `a8b8g8r8` - 32-bit pixels, d[31:24]=a, d[23:16]=b, d[15:8]=g, d[7:0]=r

        * `r5g6b5` - 16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b

        * `x2r10g10b10` - 32-bit pixels, d[29:20]=r, d[19:10]=g, d[9:0]=b

        * `x8r8g8b8` - 32-bit pixels, d[23:16]=r, d[15:8]=g, d[7:0]=b

    enum:

      - a8b8g8r8

      - r5g6b5

      - x2r10g10b10

      - x8r8g8b8



  display:

    $ref: /schemas/types.yaml#/definitions/phandle

Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Apple Interrupt Controller



maintainers:

  - Hector Martin <marcan@marcan.st>



description: |

  The Apple Interrupt Controller is a simple interrupt controller present on

  Apple ARM SoC platforms, including various iPhone and iPad devices and the

  "Apple Silicon" Macs.



  It provides the following features:



  - Level-triggered hardware IRQs wired to SoC blocks

    - Single mask bit per IRQ

    - Per-IRQ affinity setting

    - Automatic masking on event delivery (auto-ack)

    - Software triggering (ORed with hw line)

  - 2 per-CPU IPIs (meant as "self" and "other", but they are interchangeable

    if not symmetric)

  - Automatic prioritization (single event/ack register per CPU, lower IRQs =

    higher priority)

  - Automatic masking on ack

  - Default "this CPU" register view and explicit per-CPU views



  This device also represents the FIQ interrupt sources on platforms using AIC,

  which do not go through a discrete interrupt controller.



allOf:

  - $ref: /schemas/interrupt-controller.yaml#



properties:

  compatible:

    items:

      - const: apple,t8103-aic

      - const: apple,aic



  interrupt-controller: true



  '#interrupt-cells':

    const: 3

    description: |

      The 1st cell contains the interrupt type:

        - 0: Hardware IRQ

        - 1: FIQ



      The 2nd cell contains the interrupt number.

        - HW IRQs: interrupt number

        - FIQs:

          - 0: physical HV timer

          - 1: virtual HV timer

          - 2: physical guest timer

          - 3: virtual guest timer



      The 3rd cell contains the interrupt flags. This is normally

      IRQ_TYPE_LEVEL_HIGH (4).



  reg:

    description: |

      Specifies base physical address and size of the AIC registers.

    maxItems: 1



required:

  - compatible

  - '#interrupt-cells'

  - interrupt-controller

  - reg



additionalProperties: false



examples:

  - |

    soc {

        #address-cells = <2>;

        #size-cells = <2>;



        aic: interrupt-controller@23b100000 {

            compatible = "apple,t8103-aic", "apple,aic";

            #interrupt-cells = <3>;

            interrupt-controller;

            reg = <0x2 0x3b100000 0x0 0x8000>;

        };

    };

Documentation/devicetree/bindings/timer/arm,arch_timer.yaml

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@@ -34,11 +34,30 @@ properties: 
              - arm,armv8-timer



  interrupts:

    minItems: 1

    maxItems: 5

    items:

      - description: secure timer irq

      - description: non-secure timer irq

      - description: virtual timer irq

      - description: hypervisor timer irq

      - description: hypervisor virtual timer irq



  interrupt-names:

    oneOf:

      - minItems: 2

        items:

          - const: phys

          - const: virt

          - const: hyp-phys

          - const: hyp-virt

      - minItems: 3

        items:

          - const: sec-phys

          - const: phys

          - const: virt

          - const: hyp-phys

          - const: hyp-virt



  clock-frequency:

    description: The frequency of the main counter, in Hz. Should be present