Commit 0c1ce988 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Felix Fietkau
Browse files

mt76: mt7921: add wifi reset support 



Introduce wifi chip reset support for mt7921 device to recover mcu
hangs.

Co-developed-by: default avatarSean Wang <sean.wang@mediatek.com>
Signed-off-by: default avatarSean Wang <sean.wang@mediatek.com>
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent c001df97

drivers/net/wireless/mediatek/mt76/mt7921/init.c

+1 −2
Original line number Original line Diff line number Diff line
@@ -143,7 +143,7 @@ mt7921_mac_init_band(struct mt7921_dev *dev, u8 band) 
	mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN);

	mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN);

}

}





static void mt7921_mac_init(struct mt7921_dev *dev)

void mt7921_mac_init(struct mt7921_dev *dev)

{

{

	int i;

	int i;
@@ -233,7 +233,6 @@ int mt7921_register_device(struct mt7921_dev *dev) 
	INIT_LIST_HEAD(&dev->sta_poll_list);

	INIT_LIST_HEAD(&dev->sta_poll_list);

	spin_lock_init(&dev->sta_poll_lock);

	spin_lock_init(&dev->sta_poll_lock);





	init_waitqueue_head(&dev->reset_wait);

	INIT_WORK(&dev->reset_work, mt7921_mac_reset_work);

	INIT_WORK(&dev->reset_work, mt7921_mac_reset_work);





	ret = mt7921_init_hardware(dev);

	ret = mt7921_init_hardware(dev);

drivers/net/wireless/mediatek/mt76/mt7921/mac.c

+145 −56
Original line number Original line Diff line number Diff line
@@ -1184,43 +1184,77 @@ void mt7921_update_channel(struct mt76_dev *mdev) 
	mt76_connac_power_save_sched(&dev->mphy, &dev->pm);

	mt76_connac_power_save_sched(&dev->mphy, &dev->pm);

}

}





static bool

static int

mt7921_wait_reset_state(struct mt7921_dev *dev, u32 state)

mt7921_wfsys_reset(struct mt7921_dev *dev)

{

{

	bool ret;

	mt76_set(dev, 0x70002600, BIT(0));

	msleep(200);

	mt76_clear(dev, 0x70002600, BIT(0));





	ret = wait_event_timeout(dev->reset_wait,

	return __mt76_poll_msec(&dev->mt76, MT_WFSYS_SW_RST_B,

				 (READ_ONCE(dev->reset_state) & state),

				WFSYS_SW_INIT_DONE, WFSYS_SW_INIT_DONE, 500);

				 MT7921_RESET_TIMEOUT);



	WARN(!ret, "Timeout waiting for MCU reset state %x\n", state);

	return ret;

}

}





static void

static void

mt7921_dma_reset(struct mt7921_phy *phy)

mt7921_dma_reset(struct mt7921_dev *dev)

{

{

	struct mt7921_dev *dev = phy->dev;

	int i;

	int i;





	/* reset */

	mt76_clear(dev, MT_WFDMA0_RST,

		   MT_WFDMA0_RST_DMASHDL_ALL_RST | MT_WFDMA0_RST_LOGIC_RST);



	mt76_set(dev, MT_WFDMA0_RST,

		 MT_WFDMA0_RST_DMASHDL_ALL_RST | MT_WFDMA0_RST_LOGIC_RST);



	/* disable WFDMA0 */

	mt76_clear(dev, MT_WFDMA0_GLO_CFG,

	mt76_clear(dev, MT_WFDMA0_GLO_CFG,

		   MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN);

		   MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN |

		   MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN |

		   MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |

		   MT_WFDMA0_GLO_CFG_OMIT_RX_INFO |

		   MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);





	usleep_range(1000, 2000);

	mt76_poll(dev, MT_WFDMA0_GLO_CFG,

		  MT_WFDMA0_GLO_CFG_TX_DMA_BUSY |

		  MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000);





	mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WA], true);

	/* reset hw queues */

	for (i = 0; i < __MT_TXQ_MAX; i++)

	for (i = 0; i < __MT_TXQ_MAX; i++)

		mt76_queue_tx_cleanup(dev, phy->mt76->q_tx[i], true);

		mt76_queue_reset(dev, dev->mphy.q_tx[i]);





	mt76_for_each_q_rx(&dev->mt76, i) {

	for (i = 0; i < __MT_MCUQ_MAX; i++)

		mt76_queue_rx_reset(dev, i);

		mt76_queue_reset(dev, dev->mt76.q_mcu[i]);

	}





	/* re-init prefetch settings after reset */

	mt76_for_each_q_rx(&dev->mt76, i)

		mt76_queue_reset(dev, &dev->mt76.q_rx[i]);



	/* configure perfetch settings */

	mt7921_dma_prefetch(dev);

	mt7921_dma_prefetch(dev);





	/* reset dma idx */

	mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR, ~0);



	/* configure delay interrupt */

	mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0, 0);



	mt76_set(dev, MT_WFDMA0_GLO_CFG,

		 MT_WFDMA0_GLO_CFG_TX_WB_DDONE |

		 MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN |

		 MT_WFDMA0_GLO_CFG_CLK_GAT_DIS |

		 MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |

		 MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN |

		 MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);



	mt76_set(dev, MT_WFDMA0_GLO_CFG,

	mt76_set(dev, MT_WFDMA0_GLO_CFG,

		 MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN);

		 MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN);



	mt76_set(dev, 0x54000120, BIT(1));



	/* enable interrupts for TX/RX rings */

	mt7921_irq_enable(dev,

			  MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |

			  MT_INT_MCU_CMD);

}

}





void mt7921_tx_token_put(struct mt7921_dev *dev)

void mt7921_tx_token_put(struct mt7921_dev *dev)
@@ -1244,71 +1278,125 @@ void mt7921_tx_token_put(struct mt7921_dev *dev) 
	idr_destroy(&dev->token);

	idr_destroy(&dev->token);

}

}





/* system error recovery */

static void

void mt7921_mac_reset_work(struct work_struct *work)

mt7921_vif_connect_iter(void *priv, u8 *mac,

			struct ieee80211_vif *vif)

{

{

	struct mt7921_dev *dev;

	struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;

	struct mt7921_dev *dev = mvif->phy->dev;





	dev = container_of(work, struct mt7921_dev, reset_work);

	ieee80211_disconnect(vif, true);





	if (!(READ_ONCE(dev->reset_state) & MT_MCU_CMD_STOP_DMA))

	mt76_connac_mcu_uni_add_dev(&dev->mphy, vif, &mvif->sta.wcid, true);

		return;

	mt7921_mcu_set_tx(dev, vif);

}



static int

mt7921_mac_reset(struct mt7921_dev *dev)

{

	int i, err;





	ieee80211_stop_queues(mt76_hw(dev));

	mt76_connac_free_pending_tx_skbs(&dev->pm, NULL);



	mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);

	mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0);





	set_bit(MT76_RESET, &dev->mphy.state);

	set_bit(MT76_MCU_RESET, &dev->mphy.state);

	set_bit(MT76_MCU_RESET, &dev->mphy.state);

	wake_up(&dev->mt76.mcu.wait);

	wake_up(&dev->mt76.mcu.wait);

	cancel_delayed_work_sync(&dev->mphy.mac_work);

	skb_queue_purge(&dev->mt76.mcu.res_q);





	/* lock/unlock all queues to ensure that no tx is pending */

	mt76_txq_schedule_all(&dev->mphy);

	mt76_txq_schedule_all(&dev->mphy);





	mt76_worker_disable(&dev->mt76.tx_worker);

	mt76_worker_disable(&dev->mt76.tx_worker);

	napi_disable(&dev->mt76.napi[0]);

	napi_disable(&dev->mt76.napi[MT_RXQ_MAIN]);

	napi_disable(&dev->mt76.napi[1]);

	napi_disable(&dev->mt76.napi[MT_RXQ_MCU]);

	napi_disable(&dev->mt76.napi[2]);

	napi_disable(&dev->mt76.napi[MT_RXQ_MCU_WA]);

	napi_disable(&dev->mt76.tx_napi);

	napi_disable(&dev->mt76.tx_napi);





	mt7921_mutex_acquire(dev);



	mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_DMA_STOPPED);



	mt7921_tx_token_put(dev);

	mt7921_tx_token_put(dev);

	idr_init(&dev->token);

	idr_init(&dev->token);





	if (mt7921_wait_reset_state(dev, MT_MCU_CMD_RESET_DONE)) {

	/* clean up hw queues */

		mt7921_dma_reset(&dev->phy);

	for (i = 0; i < ARRAY_SIZE(dev->mt76.phy.q_tx); i++)

		mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true);





		mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_DMA_INIT);

	for (i = 0; i < ARRAY_SIZE(dev->mt76.q_mcu); i++)

		mt7921_wait_reset_state(dev, MT_MCU_CMD_RECOVERY_DONE);

		mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true);

	}





	clear_bit(MT76_MCU_RESET, &dev->mphy.state);

	mt76_for_each_q_rx(&dev->mt76, i)

	clear_bit(MT76_RESET, &dev->mphy.state);

		mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]);



	mt7921_wfsys_reset(dev);

	mt7921_dma_reset(dev);



	mt76_for_each_q_rx(&dev->mt76, i) {

		mt76_queue_rx_reset(dev, i);

		napi_enable(&dev->mt76.napi[i]);

		napi_schedule(&dev->mt76.napi[i]);

	}





	mt76_worker_enable(&dev->mt76.tx_worker);

	napi_enable(&dev->mt76.tx_napi);

	napi_enable(&dev->mt76.tx_napi);

	napi_schedule(&dev->mt76.tx_napi);

	napi_schedule(&dev->mt76.tx_napi);

	mt76_worker_enable(&dev->mt76.tx_worker);



	clear_bit(MT76_MCU_RESET, &dev->mphy.state);



	mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);

	mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);

	mt7921_irq_enable(dev,

			  MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |

			  MT_INT_MCU_CMD);



	err = mt7921_run_firmware(dev);

	if (err)

		return err;



	err = mt7921_mcu_set_eeprom(dev);

	if (err)

		return err;



	mt7921_mac_init(dev);

	return __mt7921_start(&dev->phy);

}





	napi_enable(&dev->mt76.napi[0]);

/* system error recovery */

	napi_schedule(&dev->mt76.napi[0]);

void mt7921_mac_reset_work(struct work_struct *work)

{

	struct ieee80211_hw *hw;

	struct mt7921_dev *dev;

	int i;



	dev = container_of(work, struct mt7921_dev, reset_work);

	hw = mt76_hw(dev);





	napi_enable(&dev->mt76.napi[1]);

	dev_err(dev->mt76.dev, "chip reset\n");

	napi_schedule(&dev->mt76.napi[1]);

	ieee80211_stop_queues(hw);





	napi_enable(&dev->mt76.napi[2]);

	cancel_delayed_work_sync(&dev->mphy.mac_work);

	napi_schedule(&dev->mt76.napi[2]);

	cancel_delayed_work_sync(&dev->pm.ps_work);

	cancel_work_sync(&dev->pm.wake_work);



	mutex_lock(&dev->mt76.mutex);

	for (i = 0; i < 10; i++) {

		if (!mt7921_mac_reset(dev))

			break;

	}

	mutex_unlock(&dev->mt76.mutex);





	ieee80211_wake_queues(mt76_hw(dev));

	if (i == 10)

		dev_err(dev->mt76.dev, "chip reset failed\n");





	mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_RESET_DONE);

	ieee80211_wake_queues(hw);

	mt7921_wait_reset_state(dev, MT_MCU_CMD_NORMAL_STATE);

	ieee80211_iterate_active_interfaces(hw,

					    IEEE80211_IFACE_ITER_RESUME_ALL,

					    mt7921_vif_connect_iter, 0);

}





	mt7921_mutex_release(dev);

void mt7921_reset(struct mt76_dev *mdev)

{

	struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);





	ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mphy.mac_work,

	queue_work(dev->mt76.wq, &dev->reset_work);

				     MT7921_WATCHDOG_TIME);

}

}





static void

static void
@@ -1505,4 +1593,5 @@ void mt7921_coredump_work(struct work_struct *work) 
	}

	}

	dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ,

	dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ,

		      GFP_KERNEL);

		      GFP_KERNEL);

	mt7921_reset(&dev->mt76);

}
 
}

drivers/net/wireless/mediatek/mt76/mt7921/mcu.c

+3 −0
Original line number Original line Diff line number Diff line
@@ -952,6 +952,7 @@ int mt7921_mcu_init(struct mt7921_dev *dev) 
		.mcu_skb_send_msg = mt7921_mcu_send_message,

		.mcu_skb_send_msg = mt7921_mcu_send_message,

		.mcu_parse_response = mt7921_mcu_parse_response,

		.mcu_parse_response = mt7921_mcu_parse_response,

		.mcu_restart = mt7921_mcu_restart,

		.mcu_restart = mt7921_mcu_restart,

		.mcu_reset = mt7921_reset,

	};

	};





	dev->mt76.mcu_ops = &mt7921_mcu_ops;

	dev->mt76.mcu_ops = &mt7921_mcu_ops;
@@ -1269,6 +1270,7 @@ int mt7921_mcu_drv_pmctrl(struct mt7921_dev *dev) 




	if (i == MT7921_DRV_OWN_RETRY_COUNT) {

	if (i == MT7921_DRV_OWN_RETRY_COUNT) {

		dev_err(dev->mt76.dev, "driver own failed\n");

		dev_err(dev->mt76.dev, "driver own failed\n");

		mt7921_reset(&dev->mt76);

		return -EIO;

		return -EIO;

	}

	}
@@ -1295,6 +1297,7 @@ int mt7921_mcu_fw_pmctrl(struct mt7921_dev *dev) 




	if (i == MT7921_DRV_OWN_RETRY_COUNT) {

	if (i == MT7921_DRV_OWN_RETRY_COUNT) {

		dev_err(dev->mt76.dev, "firmware own failed\n");

		dev_err(dev->mt76.dev, "firmware own failed\n");

		mt7921_reset(&dev->mt76);

		return -EIO;

		return -EIO;

	}

	}

drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h

+2 −2
Original line number Original line Diff line number Diff line
@@ -151,8 +151,6 @@ struct mt7921_dev { 




	struct work_struct init_work;

	struct work_struct init_work;

	struct work_struct reset_work;

	struct work_struct reset_work;

	wait_queue_head_t reset_wait;

	u32 reset_state;





	struct list_head sta_poll_list;

	struct list_head sta_poll_list;

	spinlock_t sta_poll_lock;

	spinlock_t sta_poll_lock;
@@ -283,6 +281,7 @@ mt7921_l1_rmw(struct mt7921_dev *dev, u32 addr, u32 mask, u32 val) 
#define mt7921_l1_set(dev, addr, val)	mt7921_l1_rmw(dev, addr, 0, val)

#define mt7921_l1_set(dev, addr, val)	mt7921_l1_rmw(dev, addr, 0, val)

#define mt7921_l1_clear(dev, addr, val)	mt7921_l1_rmw(dev, addr, val, 0)

#define mt7921_l1_clear(dev, addr, val)	mt7921_l1_rmw(dev, addr, val, 0)





void mt7921_mac_init(struct mt7921_dev *dev);

bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask);

bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask);

void mt7921_mac_reset_counters(struct mt7921_phy *phy);

void mt7921_mac_reset_counters(struct mt7921_phy *phy);

void mt7921_mac_write_txwi(struct mt7921_dev *dev, __le32 *txwi,

void mt7921_mac_write_txwi(struct mt7921_dev *dev, __le32 *txwi,
@@ -298,6 +297,7 @@ void mt7921_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 
			   struct ieee80211_sta *sta);

			   struct ieee80211_sta *sta);

void mt7921_mac_work(struct work_struct *work);

void mt7921_mac_work(struct work_struct *work);

void mt7921_mac_reset_work(struct work_struct *work);

void mt7921_mac_reset_work(struct work_struct *work);

void mt7921_reset(struct mt76_dev *mdev);

int mt7921_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,

int mt7921_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,

			  enum mt76_txq_id qid, struct mt76_wcid *wcid,

			  enum mt76_txq_id qid, struct mt76_wcid *wcid,

			  struct ieee80211_sta *sta,

			  struct ieee80211_sta *sta,

drivers/net/wireless/mediatek/mt76/mt7921/regs.h

+4 −0
Original line number Original line Diff line number Diff line
@@ -418,6 +418,10 @@ 
#define PCIE_LPCR_HOST_CLR_OWN		BIT(1)

#define PCIE_LPCR_HOST_CLR_OWN		BIT(1)

#define PCIE_LPCR_HOST_SET_OWN		BIT(0)

#define PCIE_LPCR_HOST_SET_OWN		BIT(0)





#define MT_WFSYS_SW_RST_B		0x18000140

#define WFSYS_SW_RST_B			BIT(0)

#define WFSYS_SW_INIT_DONE		BIT(4)



#define MT_CONN_ON_MISC			0x7c0600f0

#define MT_CONN_ON_MISC			0x7c0600f0

#define MT_TOP_MISC2_FW_N9_RDY		GENMASK(1, 0)

#define MT_TOP_MISC2_FW_N9_RDY		GENMASK(1, 0)