Loading Documentation/devicetree/bindings/spi/qcom,spi-qup.txt +5 −1 Original line number Diff line number Diff line Loading @@ -7,7 +7,11 @@ SPI in master mode supports up to 50MHz, up to four chip selects, programmable data path from 4 bits to 32 bits and numerous protocol variants. Required properties: - compatible: Should contain "qcom,spi-qup-v2.1.1" or "qcom,spi-qup-v2.2.1" - compatible: Should contain: "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064. "qcom,spi-qup-v2.1.1" for 8974 and later "qcom,spi-qup-v2.2.1" for 8974 v2 and later. - reg: Should contain base register location and length - interrupts: Interrupt number used by this controller Loading Documentation/devicetree/bindings/spi/spi-rockchip.txt 0 → 100644 +37 −0 Original line number Diff line number Diff line * Rockchip SPI Controller The Rockchip SPI controller is used to interface with various devices such as flash and display controllers using the SPI communication interface. Required Properties: - compatible: should be one of the following. "rockchip,rk3066-spi" for rk3066. "rockchip,rk3188-spi", "rockchip,rk3066-spi" for rk3188. "rockchip,rk3288-spi", "rockchip,rk3066-spi" for rk3288. - reg: physical base address of the controller and length of memory mapped region. - interrupts: The interrupt number to the cpu. The interrupt specifier format depends on the interrupt controller. - clocks: Must contain an entry for each entry in clock-names. - clock-names: Shall be "spiclk" for the transfer-clock, and "apb_pclk" for the peripheral clock. - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, Documentation/devicetree/bindings/dma/dma.txt - dma-names: DMA request names should include "tx" and "rx" if present. - #address-cells: should be 1. - #size-cells: should be 0. Example: spi0: spi@ff110000 { compatible = "rockchip,rk3066-spi"; reg = <0xff110000 0x1000>; dmas = <&pdma1 11>, <&pdma1 12>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; clock-names = "spiclk", "apb_pclk"; }; drivers/spi/Kconfig +13 −1 Original line number Diff line number Diff line Loading @@ -382,9 +382,21 @@ config SPI_PXA2XX config SPI_PXA2XX_PCI def_tristate SPI_PXA2XX && PCI config SPI_ROCKCHIP tristate "Rockchip SPI controller driver" depends on ARM || ARM64 || AVR32 || HEXAGON || MIPS || SUPERH help This selects a driver for Rockchip SPI controller. If you say yes to this option, support will be included for RK3066, RK3188 and RK3288 families of SPI controller. Rockchip SPI controller support DMA transport and PIO mode. The main usecase of this controller is to use spi flash as boot device. config SPI_RSPI tristate "Renesas RSPI/QSPI controller" depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST help SPI driver for Renesas RSPI and QSPI blocks. Loading drivers/spi/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -61,6 +61,7 @@ spi-pxa2xx-platform-$(CONFIG_SPI_PXA2XX_DMA) += spi-pxa2xx-dma.o obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-platform.o obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o obj-$(CONFIG_SPI_QUP) += spi-qup.o obj-$(CONFIG_SPI_ROCKCHIP) += spi-rockchip.o obj-$(CONFIG_SPI_RSPI) += spi-rspi.o obj-$(CONFIG_SPI_S3C24XX) += spi-s3c24xx-hw.o spi-s3c24xx-hw-y := spi-s3c24xx.o Loading drivers/spi/spi-orion.c +56 −12 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #include <linux/io.h> #include <linux/spi/spi.h> #include <linux/module.h> #include <linux/pm_runtime.h> #include <linux/of.h> #include <linux/clk.h> #include <linux/sizes.h> Loading @@ -23,6 +24,9 @@ #define DRIVER_NAME "orion_spi" /* Runtime PM autosuspend timeout: PM is fairly light on this driver */ #define SPI_AUTOSUSPEND_TIMEOUT 200 #define ORION_NUM_CHIPSELECTS 1 /* only one slave is supported*/ #define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */ Loading Loading @@ -277,7 +281,6 @@ orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer) return xfer->len - count; } static int orion_spi_transfer_one_message(struct spi_master *master, struct spi_message *m) { Loading Loading @@ -368,6 +371,7 @@ static int orion_spi_probe(struct platform_device *pdev) master->transfer_one_message = orion_spi_transfer_one_message; master->num_chipselect = ORION_NUM_CHIPSELECTS; master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); master->auto_runtime_pm = true; platform_set_drvdata(pdev, master); Loading @@ -380,8 +384,10 @@ static int orion_spi_probe(struct platform_device *pdev) goto out; } clk_prepare(spi->clk); clk_enable(spi->clk); status = clk_prepare_enable(spi->clk); if (status) goto out; tclk_hz = clk_get_rate(spi->clk); master->max_speed_hz = DIV_ROUND_UP(tclk_hz, 4); master->min_speed_hz = DIV_ROUND_UP(tclk_hz, 30); Loading @@ -393,16 +399,27 @@ static int orion_spi_probe(struct platform_device *pdev) goto out_rel_clk; } if (orion_spi_reset(spi) < 0) goto out_rel_clk; pm_runtime_set_active(&pdev->dev); pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); pm_runtime_enable(&pdev->dev); status = orion_spi_reset(spi); if (status < 0) goto out_rel_pm; pm_runtime_mark_last_busy(&pdev->dev); pm_runtime_put_autosuspend(&pdev->dev); master->dev.of_node = pdev->dev.of_node; status = devm_spi_register_master(&pdev->dev, master); status = spi_register_master(master); if (status < 0) goto out_rel_clk; goto out_rel_pm; return status; out_rel_pm: pm_runtime_disable(&pdev->dev); out_rel_clk: clk_disable_unprepare(spi->clk); out: Loading @@ -413,19 +430,45 @@ static int orion_spi_probe(struct platform_device *pdev) static int orion_spi_remove(struct platform_device *pdev) { struct spi_master *master; struct orion_spi *spi; master = platform_get_drvdata(pdev); spi = spi_master_get_devdata(master); struct spi_master *master = platform_get_drvdata(pdev); struct orion_spi *spi = spi_master_get_devdata(master); pm_runtime_get_sync(&pdev->dev); clk_disable_unprepare(spi->clk); spi_unregister_master(master); pm_runtime_disable(&pdev->dev); return 0; } MODULE_ALIAS("platform:" DRIVER_NAME); #ifdef CONFIG_PM_RUNTIME static int orion_spi_runtime_suspend(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); struct orion_spi *spi = spi_master_get_devdata(master); clk_disable_unprepare(spi->clk); return 0; } static int orion_spi_runtime_resume(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); struct orion_spi *spi = spi_master_get_devdata(master); return clk_prepare_enable(spi->clk); } #endif static const struct dev_pm_ops orion_spi_pm_ops = { SET_RUNTIME_PM_OPS(orion_spi_runtime_suspend, orion_spi_runtime_resume, NULL) }; static const struct of_device_id orion_spi_of_match_table[] = { { .compatible = "marvell,orion-spi", }, {} Loading @@ -436,6 +479,7 @@ static struct platform_driver orion_spi_driver = { .driver = { .name = DRIVER_NAME, .owner = THIS_MODULE, .pm = &orion_spi_pm_ops, .of_match_table = of_match_ptr(orion_spi_of_match_table), }, .probe = orion_spi_probe, Loading Loading
Documentation/devicetree/bindings/spi/qcom,spi-qup.txt +5 −1 Original line number Diff line number Diff line Loading @@ -7,7 +7,11 @@ SPI in master mode supports up to 50MHz, up to four chip selects, programmable data path from 4 bits to 32 bits and numerous protocol variants. Required properties: - compatible: Should contain "qcom,spi-qup-v2.1.1" or "qcom,spi-qup-v2.2.1" - compatible: Should contain: "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064. "qcom,spi-qup-v2.1.1" for 8974 and later "qcom,spi-qup-v2.2.1" for 8974 v2 and later. - reg: Should contain base register location and length - interrupts: Interrupt number used by this controller Loading
Documentation/devicetree/bindings/spi/spi-rockchip.txt 0 → 100644 +37 −0 Original line number Diff line number Diff line * Rockchip SPI Controller The Rockchip SPI controller is used to interface with various devices such as flash and display controllers using the SPI communication interface. Required Properties: - compatible: should be one of the following. "rockchip,rk3066-spi" for rk3066. "rockchip,rk3188-spi", "rockchip,rk3066-spi" for rk3188. "rockchip,rk3288-spi", "rockchip,rk3066-spi" for rk3288. - reg: physical base address of the controller and length of memory mapped region. - interrupts: The interrupt number to the cpu. The interrupt specifier format depends on the interrupt controller. - clocks: Must contain an entry for each entry in clock-names. - clock-names: Shall be "spiclk" for the transfer-clock, and "apb_pclk" for the peripheral clock. - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, Documentation/devicetree/bindings/dma/dma.txt - dma-names: DMA request names should include "tx" and "rx" if present. - #address-cells: should be 1. - #size-cells: should be 0. Example: spi0: spi@ff110000 { compatible = "rockchip,rk3066-spi"; reg = <0xff110000 0x1000>; dmas = <&pdma1 11>, <&pdma1 12>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; clock-names = "spiclk", "apb_pclk"; };
drivers/spi/Kconfig +13 −1 Original line number Diff line number Diff line Loading @@ -382,9 +382,21 @@ config SPI_PXA2XX config SPI_PXA2XX_PCI def_tristate SPI_PXA2XX && PCI config SPI_ROCKCHIP tristate "Rockchip SPI controller driver" depends on ARM || ARM64 || AVR32 || HEXAGON || MIPS || SUPERH help This selects a driver for Rockchip SPI controller. If you say yes to this option, support will be included for RK3066, RK3188 and RK3288 families of SPI controller. Rockchip SPI controller support DMA transport and PIO mode. The main usecase of this controller is to use spi flash as boot device. config SPI_RSPI tristate "Renesas RSPI/QSPI controller" depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST help SPI driver for Renesas RSPI and QSPI blocks. Loading
drivers/spi/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -61,6 +61,7 @@ spi-pxa2xx-platform-$(CONFIG_SPI_PXA2XX_DMA) += spi-pxa2xx-dma.o obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-platform.o obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o obj-$(CONFIG_SPI_QUP) += spi-qup.o obj-$(CONFIG_SPI_ROCKCHIP) += spi-rockchip.o obj-$(CONFIG_SPI_RSPI) += spi-rspi.o obj-$(CONFIG_SPI_S3C24XX) += spi-s3c24xx-hw.o spi-s3c24xx-hw-y := spi-s3c24xx.o Loading
drivers/spi/spi-orion.c +56 −12 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #include <linux/io.h> #include <linux/spi/spi.h> #include <linux/module.h> #include <linux/pm_runtime.h> #include <linux/of.h> #include <linux/clk.h> #include <linux/sizes.h> Loading @@ -23,6 +24,9 @@ #define DRIVER_NAME "orion_spi" /* Runtime PM autosuspend timeout: PM is fairly light on this driver */ #define SPI_AUTOSUSPEND_TIMEOUT 200 #define ORION_NUM_CHIPSELECTS 1 /* only one slave is supported*/ #define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */ Loading Loading @@ -277,7 +281,6 @@ orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer) return xfer->len - count; } static int orion_spi_transfer_one_message(struct spi_master *master, struct spi_message *m) { Loading Loading @@ -368,6 +371,7 @@ static int orion_spi_probe(struct platform_device *pdev) master->transfer_one_message = orion_spi_transfer_one_message; master->num_chipselect = ORION_NUM_CHIPSELECTS; master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); master->auto_runtime_pm = true; platform_set_drvdata(pdev, master); Loading @@ -380,8 +384,10 @@ static int orion_spi_probe(struct platform_device *pdev) goto out; } clk_prepare(spi->clk); clk_enable(spi->clk); status = clk_prepare_enable(spi->clk); if (status) goto out; tclk_hz = clk_get_rate(spi->clk); master->max_speed_hz = DIV_ROUND_UP(tclk_hz, 4); master->min_speed_hz = DIV_ROUND_UP(tclk_hz, 30); Loading @@ -393,16 +399,27 @@ static int orion_spi_probe(struct platform_device *pdev) goto out_rel_clk; } if (orion_spi_reset(spi) < 0) goto out_rel_clk; pm_runtime_set_active(&pdev->dev); pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); pm_runtime_enable(&pdev->dev); status = orion_spi_reset(spi); if (status < 0) goto out_rel_pm; pm_runtime_mark_last_busy(&pdev->dev); pm_runtime_put_autosuspend(&pdev->dev); master->dev.of_node = pdev->dev.of_node; status = devm_spi_register_master(&pdev->dev, master); status = spi_register_master(master); if (status < 0) goto out_rel_clk; goto out_rel_pm; return status; out_rel_pm: pm_runtime_disable(&pdev->dev); out_rel_clk: clk_disable_unprepare(spi->clk); out: Loading @@ -413,19 +430,45 @@ static int orion_spi_probe(struct platform_device *pdev) static int orion_spi_remove(struct platform_device *pdev) { struct spi_master *master; struct orion_spi *spi; master = platform_get_drvdata(pdev); spi = spi_master_get_devdata(master); struct spi_master *master = platform_get_drvdata(pdev); struct orion_spi *spi = spi_master_get_devdata(master); pm_runtime_get_sync(&pdev->dev); clk_disable_unprepare(spi->clk); spi_unregister_master(master); pm_runtime_disable(&pdev->dev); return 0; } MODULE_ALIAS("platform:" DRIVER_NAME); #ifdef CONFIG_PM_RUNTIME static int orion_spi_runtime_suspend(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); struct orion_spi *spi = spi_master_get_devdata(master); clk_disable_unprepare(spi->clk); return 0; } static int orion_spi_runtime_resume(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); struct orion_spi *spi = spi_master_get_devdata(master); return clk_prepare_enable(spi->clk); } #endif static const struct dev_pm_ops orion_spi_pm_ops = { SET_RUNTIME_PM_OPS(orion_spi_runtime_suspend, orion_spi_runtime_resume, NULL) }; static const struct of_device_id orion_spi_of_match_table[] = { { .compatible = "marvell,orion-spi", }, {} Loading @@ -436,6 +479,7 @@ static struct platform_driver orion_spi_driver = { .driver = { .name = DRIVER_NAME, .owner = THIS_MODULE, .pm = &orion_spi_pm_ops, .of_match_table = of_match_ptr(orion_spi_of_match_table), }, .probe = orion_spi_probe, Loading