Commit 0bda8d82 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-fixes-2022-09-29' of... 

Merge tag 'drm-intel-next-fixes-2022-09-29' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

- Fix release build bug in 'remove GuC log size module parameters' (John Harrison)
- Remove ipc_enabled from struct drm_i915_private (Jani Nikula)
- Do not cleanup obj with NULL bo->resource (Nirmoy Das)
- Fix device info for devices without display (Jani Nikula)
- Force DPLL calculation for TC ports after readout (Ville Syrjälä)
- Use i915_vm_put on ppgtt_create error paths (Chris Wilson)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YzWqtwPNxAe+r9FO@tursulin-desk
parents e8573000 20e377e7

drivers/gpu/drm/i915/display/intel_ddi.c

+15 −3
Original line number Diff line number Diff line
@@ -3600,10 +3600,22 @@ static void intel_ddi_sync_state(struct intel_encoder *encoder, 
static bool intel_ddi_initial_fastset_check(struct intel_encoder *encoder,

					    struct intel_crtc_state *crtc_state)

{

	if (intel_crtc_has_dp_encoder(crtc_state))

		return intel_dp_initial_fastset_check(encoder, crtc_state);

	struct drm_i915_private *i915 = to_i915(encoder->base.dev);

	enum phy phy = intel_port_to_phy(i915, encoder->port);

	bool fastset = true;



	return true;

	if (intel_phy_is_tc(i915, phy)) {

		drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] Forcing full modeset to compute TC port DPLLs\n",

			    encoder->base.base.id, encoder->base.name);

		crtc_state->uapi.mode_changed = true;

		fastset = false;

	}



	if (intel_crtc_has_dp_encoder(crtc_state) &&

	    !intel_dp_initial_fastset_check(encoder, crtc_state))

		fastset = false;



	return fastset;

}



static enum intel_output_type

drivers/gpu/drm/i915/gem/i915_gem_ttm.c

+1 −1
Original line number Diff line number Diff line
@@ -511,7 +511,7 @@ static void i915_ttm_delete_mem_notify(struct ttm_buffer_object *bo) 
	struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);

	intel_wakeref_t wakeref = 0;



	if (likely(obj)) {

	if (bo->resource && likely(obj)) {

		/* ttm_bo_release() already has dma_resv_lock */

		if (i915_ttm_cpu_maps_iomem(bo->resource))

			wakeref = intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);

drivers/gpu/drm/i915/gt/gen6_ppgtt.c

+8 −8
Original line number Diff line number Diff line
@@ -247,6 +247,7 @@ static int gen6_ppgtt_init_scratch(struct gen6_ppgtt *ppgtt) 
	i915_gem_object_put(vm->scratch[1]);

err_scratch0:

	i915_gem_object_put(vm->scratch[0]);

	vm->scratch[0] = NULL;

	return ret;

}
@@ -268,9 +269,10 @@ static void gen6_ppgtt_cleanup(struct i915_address_space *vm) 
	gen6_ppgtt_free_pd(ppgtt);

	free_scratch(vm);



	mutex_destroy(&ppgtt->flush);



	if (ppgtt->base.pd)

		free_pd(&ppgtt->base.vm, ppgtt->base.pd);



	mutex_destroy(&ppgtt->flush);

}



static void pd_vma_bind(struct i915_address_space *vm,
@@ -449,19 +451,17 @@ struct i915_ppgtt *gen6_ppgtt_create(struct intel_gt *gt) 


	err = gen6_ppgtt_init_scratch(ppgtt);

	if (err)

		goto err_free;

		goto err_put;



	ppgtt->base.pd = gen6_alloc_top_pd(ppgtt);

	if (IS_ERR(ppgtt->base.pd)) {

		err = PTR_ERR(ppgtt->base.pd);

		goto err_scratch;

		goto err_put;

	}



	return &ppgtt->base;



err_scratch:

	free_scratch(&ppgtt->base.vm);

err_free:

	kfree(ppgtt);

err_put:

	i915_vm_put(&ppgtt->base.vm);

	return ERR_PTR(err);

}

drivers/gpu/drm/i915/gt/gen8_ppgtt.c

+30 −28
Original line number Diff line number Diff line
@@ -196,7 +196,10 @@ static void gen8_ppgtt_cleanup(struct i915_address_space *vm) 
	if (intel_vgpu_active(vm->i915))

		gen8_ppgtt_notify_vgt(ppgtt, false);



	__gen8_ppgtt_cleanup(vm, ppgtt->pd, gen8_pd_top_count(vm), vm->top);

	if (ppgtt->pd)

		__gen8_ppgtt_cleanup(vm, ppgtt->pd,

				     gen8_pd_top_count(vm), vm->top);



	free_scratch(vm);

}
@@ -803,8 +806,10 @@ static int gen8_init_scratch(struct i915_address_space *vm) 
		struct drm_i915_gem_object *obj;



		obj = vm->alloc_pt_dma(vm, I915_GTT_PAGE_SIZE_4K);

		if (IS_ERR(obj))

		if (IS_ERR(obj)) {

			ret = PTR_ERR(obj);

			goto free_scratch;

		}



		ret = map_pt_dma(vm, obj);

		if (ret) {
@@ -823,7 +828,8 @@ static int gen8_init_scratch(struct i915_address_space *vm) 
free_scratch:

	while (i--)

		i915_gem_object_put(vm->scratch[i]);

	return -ENOMEM;

	vm->scratch[0] = NULL;

	return ret;

}



static int gen8_preallocate_top_level_pdp(struct i915_ppgtt *ppgtt)
@@ -901,6 +907,7 @@ gen8_alloc_top_pd(struct i915_address_space *vm) 
struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,

				     unsigned long lmem_pt_obj_flags)

{

	struct i915_page_directory *pd;

	struct i915_ppgtt *ppgtt;

	int err;
@@ -946,21 +953,7 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt, 
		ppgtt->vm.alloc_scratch_dma = alloc_pt_dma;

	}



	err = gen8_init_scratch(&ppgtt->vm);

	if (err)

		goto err_free;



	ppgtt->pd = gen8_alloc_top_pd(&ppgtt->vm);

	if (IS_ERR(ppgtt->pd)) {

		err = PTR_ERR(ppgtt->pd);

		goto err_free_scratch;

	}



	if (!i915_vm_is_4lvl(&ppgtt->vm)) {

		err = gen8_preallocate_top_level_pdp(ppgtt);

		if (err)

			goto err_free_pd;

	}

	ppgtt->vm.pte_encode = gen8_pte_encode;



	ppgtt->vm.bind_async_flags = I915_VMA_LOCAL_BIND;

	ppgtt->vm.insert_entries = gen8_ppgtt_insert;
@@ -971,22 +964,31 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt, 
	ppgtt->vm.allocate_va_range = gen8_ppgtt_alloc;

	ppgtt->vm.clear_range = gen8_ppgtt_clear;

	ppgtt->vm.foreach = gen8_ppgtt_foreach;

	ppgtt->vm.cleanup = gen8_ppgtt_cleanup;



	ppgtt->vm.pte_encode = gen8_pte_encode;

	err = gen8_init_scratch(&ppgtt->vm);

	if (err)

		goto err_put;



	pd = gen8_alloc_top_pd(&ppgtt->vm);

	if (IS_ERR(pd)) {

		err = PTR_ERR(pd);

		goto err_put;

	}

	ppgtt->pd = pd;



	if (!i915_vm_is_4lvl(&ppgtt->vm)) {

		err = gen8_preallocate_top_level_pdp(ppgtt);

		if (err)

			goto err_put;

	}



	if (intel_vgpu_active(gt->i915))

		gen8_ppgtt_notify_vgt(ppgtt, true);



	ppgtt->vm.cleanup = gen8_ppgtt_cleanup;



	return ppgtt;



err_free_pd:

	__gen8_ppgtt_cleanup(&ppgtt->vm, ppgtt->pd,

			     gen8_pd_top_count(&ppgtt->vm), ppgtt->vm.top);

err_free_scratch:

	free_scratch(&ppgtt->vm);

err_free:

	kfree(ppgtt);

err_put:

	i915_vm_put(&ppgtt->vm);

	return ERR_PTR(err);

}

drivers/gpu/drm/i915/gt/intel_gtt.c

+3 −0
Original line number Diff line number Diff line
@@ -405,6 +405,9 @@ void free_scratch(struct i915_address_space *vm) 
{

	int i;



	if (!vm->scratch[0])

		return;



	for (i = 0; i <= vm->top; i++)

		i915_gem_object_put(vm->scratch[i]);

}