Loading arch/sparc64/kernel/pci.c +12 −5 Original line number Diff line number Diff line Loading @@ -469,6 +469,13 @@ static void __init apb_calc_first_last(u8 map, u32 *first_p, u32 *last_p) *last_p = last; } static void __init pci_resource_adjust(struct resource *res, struct resource *root) { res->start += root->start; res->end += root->start; } /* Cook up fake bus resources for SUNW,simba PCI bridges which lack * a proper 'ranges' property. */ Loading @@ -486,7 +493,7 @@ static void __init apb_fake_ranges(struct pci_dev *dev, res->start = (first << 21); res->end = (last << 21) + ((1 << 21) - 1); res->flags = IORESOURCE_IO; pbm->parent->resource_adjust(dev, res, &pbm->io_space); pci_resource_adjust(res, &pbm->io_space); pci_read_config_byte(dev, APB_MEM_ADDRESS_MAP, &map); apb_calc_first_last(map, &first, &last); Loading @@ -494,7 +501,7 @@ static void __init apb_fake_ranges(struct pci_dev *dev, res->start = (first << 21); res->end = (last << 21) + ((1 << 21) - 1); res->flags = IORESOURCE_MEM; pbm->parent->resource_adjust(dev, res, &pbm->mem_space); pci_resource_adjust(res, &pbm->mem_space); } static void __init pci_of_scan_bus(struct pci_pbm_info *pbm, Loading Loading @@ -594,7 +601,7 @@ void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm, * layer routine that can calculate a resource for a given * range property value in a PCI device. */ pbm->parent->resource_adjust(dev, res, root); pci_resource_adjust(res, root); } simba_cont: sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus), Loading Loading @@ -803,7 +810,7 @@ void pcibios_resource_to_bus(struct pci_dev *pdev, struct pci_bus_region *region else root = &pbm->mem_space; pbm->parent->resource_adjust(pdev, &zero_res, root); pci_resource_adjust(&zero_res, root); region->start = res->start - zero_res.start; region->end = res->end - zero_res.start; Loading @@ -824,7 +831,7 @@ void pcibios_bus_to_resource(struct pci_dev *pdev, struct resource *res, else root = &pbm->mem_space; pbm->parent->resource_adjust(pdev, res, root); pci_resource_adjust(res, root); } EXPORT_SYMBOL(pcibios_bus_to_resource); Loading arch/sparc64/kernel/pci_psycho.c +0 −9 Original line number Diff line number Diff line Loading @@ -894,14 +894,6 @@ static void psycho_register_error_handlers(struct pci_controller_info *p) } /* PSYCHO boot time probing and initialization. */ static void psycho_resource_adjust(struct pci_dev *pdev, struct resource *res, struct resource *root) { res->start += root->start; res->end += root->start; } static void psycho_base_address_update(struct pci_dev *pdev, int resource) { struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller; Loading Loading @@ -1218,7 +1210,6 @@ void psycho_init(struct device_node *dp, char *model_name) p->pbms_same_domain = 0; p->scan_bus = psycho_scan_bus; p->base_address_update = psycho_base_address_update; p->resource_adjust = psycho_resource_adjust; p->pci_ops = &psycho_ops; prop = of_find_property(dp, "reg", NULL); Loading arch/sparc64/kernel/pci_sabre.c +0 −17 Original line number Diff line number Diff line Loading @@ -862,22 +862,6 @@ static void sabre_register_error_handlers(struct pci_controller_info *p) sabre_write(base + SABRE_PCICTRL, tmp); } static void sabre_resource_adjust(struct pci_dev *pdev, struct resource *res, struct resource *root) { struct pci_pbm_info *pbm = pdev->bus->sysdata; unsigned long base; if (res->flags & IORESOURCE_IO) base = pbm->controller_regs + SABRE_IOSPACE; else base = pbm->controller_regs + SABRE_MEMSPACE; res->start += base; res->end += base; } static void sabre_base_address_update(struct pci_dev *pdev, int resource) { struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller; Loading Loading @@ -1116,7 +1100,6 @@ void sabre_init(struct device_node *dp, char *model_name) p->pbms_same_domain = 1; p->scan_bus = sabre_scan_bus; p->base_address_update = sabre_base_address_update; p->resource_adjust = sabre_resource_adjust; p->pci_ops = &sabre_ops; /* Loading arch/sparc64/kernel/pci_schizo.c +0 −9 Original line number Diff line number Diff line Loading @@ -1295,14 +1295,6 @@ static void schizo_base_address_update(struct pci_dev *pdev, int resource) pci_write_config_dword(pdev, where + 4, 0); } static void schizo_resource_adjust(struct pci_dev *pdev, struct resource *res, struct resource *root) { res->start += root->start; res->end += root->start; } #define SCHIZO_STRBUF_CONTROL (0x02800UL) #define SCHIZO_STRBUF_FLUSH (0x02808UL) #define SCHIZO_STRBUF_FSYNC (0x02810UL) Loading Loading @@ -1670,7 +1662,6 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ p->index = pci_num_controllers++; p->scan_bus = schizo_scan_bus; p->base_address_update = schizo_base_address_update; p->resource_adjust = schizo_resource_adjust; p->pci_ops = &schizo_ops; /* Like PSYCHO we have a 2GB aligned area for memory space. */ Loading arch/sparc64/kernel/pci_sun4v.c +0 −9 Original line number Diff line number Diff line Loading @@ -743,14 +743,6 @@ static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource) pci_write_config_dword(pdev, where + 4, 0); } static void pci_sun4v_resource_adjust(struct pci_dev *pdev, struct resource *res, struct resource *root) { res->start += root->start; res->end += root->start; } static unsigned long probe_existing_entries(struct pci_pbm_info *pbm, struct pci_iommu *iommu) { Loading Loading @@ -1387,7 +1379,6 @@ void sun4v_pci_init(struct device_node *dp, char *model_name) p->scan_bus = pci_sun4v_scan_bus; p->base_address_update = pci_sun4v_base_address_update; p->resource_adjust = pci_sun4v_resource_adjust; #ifdef CONFIG_PCI_MSI p->setup_msi_irq = pci_sun4v_setup_msi_irq; p->teardown_msi_irq = pci_sun4v_teardown_msi_irq; Loading Loading
arch/sparc64/kernel/pci.c +12 −5 Original line number Diff line number Diff line Loading @@ -469,6 +469,13 @@ static void __init apb_calc_first_last(u8 map, u32 *first_p, u32 *last_p) *last_p = last; } static void __init pci_resource_adjust(struct resource *res, struct resource *root) { res->start += root->start; res->end += root->start; } /* Cook up fake bus resources for SUNW,simba PCI bridges which lack * a proper 'ranges' property. */ Loading @@ -486,7 +493,7 @@ static void __init apb_fake_ranges(struct pci_dev *dev, res->start = (first << 21); res->end = (last << 21) + ((1 << 21) - 1); res->flags = IORESOURCE_IO; pbm->parent->resource_adjust(dev, res, &pbm->io_space); pci_resource_adjust(res, &pbm->io_space); pci_read_config_byte(dev, APB_MEM_ADDRESS_MAP, &map); apb_calc_first_last(map, &first, &last); Loading @@ -494,7 +501,7 @@ static void __init apb_fake_ranges(struct pci_dev *dev, res->start = (first << 21); res->end = (last << 21) + ((1 << 21) - 1); res->flags = IORESOURCE_MEM; pbm->parent->resource_adjust(dev, res, &pbm->mem_space); pci_resource_adjust(res, &pbm->mem_space); } static void __init pci_of_scan_bus(struct pci_pbm_info *pbm, Loading Loading @@ -594,7 +601,7 @@ void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm, * layer routine that can calculate a resource for a given * range property value in a PCI device. */ pbm->parent->resource_adjust(dev, res, root); pci_resource_adjust(res, root); } simba_cont: sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus), Loading Loading @@ -803,7 +810,7 @@ void pcibios_resource_to_bus(struct pci_dev *pdev, struct pci_bus_region *region else root = &pbm->mem_space; pbm->parent->resource_adjust(pdev, &zero_res, root); pci_resource_adjust(&zero_res, root); region->start = res->start - zero_res.start; region->end = res->end - zero_res.start; Loading @@ -824,7 +831,7 @@ void pcibios_bus_to_resource(struct pci_dev *pdev, struct resource *res, else root = &pbm->mem_space; pbm->parent->resource_adjust(pdev, res, root); pci_resource_adjust(res, root); } EXPORT_SYMBOL(pcibios_bus_to_resource); Loading
arch/sparc64/kernel/pci_psycho.c +0 −9 Original line number Diff line number Diff line Loading @@ -894,14 +894,6 @@ static void psycho_register_error_handlers(struct pci_controller_info *p) } /* PSYCHO boot time probing and initialization. */ static void psycho_resource_adjust(struct pci_dev *pdev, struct resource *res, struct resource *root) { res->start += root->start; res->end += root->start; } static void psycho_base_address_update(struct pci_dev *pdev, int resource) { struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller; Loading Loading @@ -1218,7 +1210,6 @@ void psycho_init(struct device_node *dp, char *model_name) p->pbms_same_domain = 0; p->scan_bus = psycho_scan_bus; p->base_address_update = psycho_base_address_update; p->resource_adjust = psycho_resource_adjust; p->pci_ops = &psycho_ops; prop = of_find_property(dp, "reg", NULL); Loading
arch/sparc64/kernel/pci_sabre.c +0 −17 Original line number Diff line number Diff line Loading @@ -862,22 +862,6 @@ static void sabre_register_error_handlers(struct pci_controller_info *p) sabre_write(base + SABRE_PCICTRL, tmp); } static void sabre_resource_adjust(struct pci_dev *pdev, struct resource *res, struct resource *root) { struct pci_pbm_info *pbm = pdev->bus->sysdata; unsigned long base; if (res->flags & IORESOURCE_IO) base = pbm->controller_regs + SABRE_IOSPACE; else base = pbm->controller_regs + SABRE_MEMSPACE; res->start += base; res->end += base; } static void sabre_base_address_update(struct pci_dev *pdev, int resource) { struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller; Loading Loading @@ -1116,7 +1100,6 @@ void sabre_init(struct device_node *dp, char *model_name) p->pbms_same_domain = 1; p->scan_bus = sabre_scan_bus; p->base_address_update = sabre_base_address_update; p->resource_adjust = sabre_resource_adjust; p->pci_ops = &sabre_ops; /* Loading
arch/sparc64/kernel/pci_schizo.c +0 −9 Original line number Diff line number Diff line Loading @@ -1295,14 +1295,6 @@ static void schizo_base_address_update(struct pci_dev *pdev, int resource) pci_write_config_dword(pdev, where + 4, 0); } static void schizo_resource_adjust(struct pci_dev *pdev, struct resource *res, struct resource *root) { res->start += root->start; res->end += root->start; } #define SCHIZO_STRBUF_CONTROL (0x02800UL) #define SCHIZO_STRBUF_FLUSH (0x02808UL) #define SCHIZO_STRBUF_FSYNC (0x02810UL) Loading Loading @@ -1670,7 +1662,6 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ p->index = pci_num_controllers++; p->scan_bus = schizo_scan_bus; p->base_address_update = schizo_base_address_update; p->resource_adjust = schizo_resource_adjust; p->pci_ops = &schizo_ops; /* Like PSYCHO we have a 2GB aligned area for memory space. */ Loading
arch/sparc64/kernel/pci_sun4v.c +0 −9 Original line number Diff line number Diff line Loading @@ -743,14 +743,6 @@ static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource) pci_write_config_dword(pdev, where + 4, 0); } static void pci_sun4v_resource_adjust(struct pci_dev *pdev, struct resource *res, struct resource *root) { res->start += root->start; res->end += root->start; } static unsigned long probe_existing_entries(struct pci_pbm_info *pbm, struct pci_iommu *iommu) { Loading Loading @@ -1387,7 +1379,6 @@ void sun4v_pci_init(struct device_node *dp, char *model_name) p->scan_bus = pci_sun4v_scan_bus; p->base_address_update = pci_sun4v_base_address_update; p->resource_adjust = pci_sun4v_resource_adjust; #ifdef CONFIG_PCI_MSI p->setup_msi_irq = pci_sun4v_setup_msi_irq; p->teardown_msi_irq = pci_sun4v_teardown_msi_irq; Loading