Commit 0b3a4dd4 authored by Matt Atwood's avatar Matt Atwood Committed by Matt Roper
Browse files

drm/i915/tgl: Add Wa_1606054188:tgl 



On Tiger Lake we do not support source keying in the pixel formats P010,
P012, P016.

v2: Move WA to end of function. Create helper function for format
check. Less verbose debugging messaging.

v3: whitespace

v4(MattR):
 - Actually return EINVAL to reject this combination.
 - Pass format parameter as u32.
 - Make test TGL-specific for now.
 - Switch to per-device logging.
 - Shorten/simplify comment.

Bspec: 52890
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarMatt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200224223651.3801646-1-matthew.d.roper@intel.com


Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
parent 3a1b82a1

drivers/gpu/drm/i915/display/intel_sprite.c

+21 −0
Original line number Diff line number Diff line
@@ -2077,6 +2077,18 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state, 
	return 0;

}



static bool intel_format_is_p01x(u32 format)

{

	switch (format) {

	case DRM_FORMAT_P010:

	case DRM_FORMAT_P012:

	case DRM_FORMAT_P016:

		return true;

	default:

		return false;

	}

}



static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,

			      const struct intel_plane_state *plane_state)

{
@@ -2155,6 +2167,15 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, 
		return -EINVAL;

	}



	/* Wa_1606054188:tgl */

	if (IS_TIGERLAKE(dev_priv) &&

	    plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE &&

	    intel_format_is_p01x(fb->format->format)) {

		drm_dbg_kms(&dev_priv->drm,

			    "Source color keying not supported with P01x formats\n");

		return -EINVAL;

	}



	return 0;

}