Unverified Commit 0b3751dc authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'arm-soc/for-6.4/devicetree' of https://github.com/Broadcom/stblinux into soc/dt 

This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 6.4, please pull the following:

- William adds the new-style High Speed SPI controller node to the BCA
  SoCs

* tag 'arm-soc/for-6.4/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: broadcom: bcmbca: Add spi controller node

Link: https://lore.kernel.org/r/20230410232606.1917803-1-f.fainelli@gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 325ae154 7858dded

arch/arm/boot/dts/bcm47622.dtsi

+18 −0
Original line number Diff line number Diff line
@@ -88,6 +88,12 @@ 
			clock-div = <4>;

			clock-mult = <1>;

		};



		hsspi_pll: hsspi-pll {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <200000000>;

		};

	};



	psci {
@@ -119,6 +125,18 @@ 
		#size-cells = <1>;

		ranges = <0 0xff800000 0x800000>;



		hsspi: spi@1000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "brcm,bcm47622-hsspi", "brcm,bcmbca-hsspi-v1.0";

			reg = <0x1000 0x600>;

			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&hsspi_pll &hsspi_pll>;

			clock-names = "hsspi", "pll";

			num-cs = <8>;

			status = "disabled";

		};



		uart0: serial@12000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x12000 0x1000>;

arch/arm/boot/dts/bcm63138.dtsi

+18 −0
Original line number Diff line number Diff line
@@ -66,6 +66,12 @@ 
			clock-div = <4>;

			clock-mult = <1>;

		};



		hsspi_pll: hsspi-pll {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <400000000>;

		};

	};



	/* ARM bus */
@@ -203,6 +209,18 @@ 
			status = "disabled";

		};



		hsspi: spi@1000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "brcm,bcm63138-hsspi", "brcm,bcmbca-hsspi-v1.0";

			reg = <0x1000 0x600>;

			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&hsspi_pll &hsspi_pll>;

			clock-names = "hsspi", "pll";

			num-cs = <8>;

			status = "disabled";

		};



		nand_controller: nand-controller@2000 {

			#address-cells = <1>;

			#size-cells = <0>;

arch/arm/boot/dts/bcm63148.dtsi

+18 −0
Original line number Diff line number Diff line
@@ -60,6 +60,12 @@ 
			#clock-cells = <0>;

			clock-frequency = <50000000>;

		};



		hsspi_pll: hsspi-pll {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <400000000>;

		};

	};



	psci {
@@ -100,5 +106,17 @@ 
			clock-names = "refclk";

			status = "disabled";

		};



		hsspi: spi@1000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "brcm,bcm63148-hsspi", "brcm,bcmbca-hsspi-v1.0";

			reg = <0x1000 0x600>;

			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&hsspi_pll &hsspi_pll>;

			clock-names = "hsspi", "pll";

			num-cs = <8>;

			status = "disabled";

		};

	};

};

arch/arm/boot/dts/bcm63178.dtsi

+19 −0
Original line number Diff line number Diff line
@@ -71,6 +71,7 @@ 
			#clock-cells = <0>;

			clock-frequency = <200000000>;

		};



		uart_clk: uart-clk {

			compatible = "fixed-factor-clock";

			#clock-cells = <0>;
@@ -78,6 +79,12 @@ 
			clock-div = <4>;

			clock-mult = <1>;

		};



		hsspi_pll: hsspi-pll {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <200000000>;

		};

	};



	psci {
@@ -109,6 +116,18 @@ 
		#size-cells = <1>;

		ranges = <0 0xff800000 0x800000>;



		hsspi: spi@1000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "brcm,bcm63178-hsspi", "brcm,bcmbca-hsspi-v1.0";

			reg = <0x1000 0x600>;

			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&hsspi_pll &hsspi_pll>;

			clock-names = "hsspi", "pll";

			num-cs = <8>;

			status = "disabled";

		};



		uart0: serial@12000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x12000 0x1000>;

arch/arm/boot/dts/bcm6756.dtsi

+19 −0
Original line number Diff line number Diff line
@@ -88,6 +88,12 @@ 
			clock-div = <4>;

			clock-mult = <1>;

		};



		hsspi_pll: hsspi-pll {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <200000000>;

		};

	};



	psci {
@@ -119,6 +125,19 @@ 
		#size-cells = <1>;

		ranges = <0 0xff800000 0x800000>;



		hsspi: spi@1000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "brcm,bcm6756-hsspi", "brcm,bcmbca-hsspi-v1.1";

			reg = <0x1000 0x600>, <0x2610 0x4>;

			reg-names = "hsspi", "spim-ctrl";

			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&hsspi_pll &hsspi_pll>;

			clock-names = "hsspi", "pll";

			num-cs = <8>;

			status = "disabled";

		};



		uart0: serial@12000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x12000 0x1000>;