Commit 0b32c1b4 authored by Quan Nguyen's avatar Quan Nguyen Committed by Joel Stanley
Browse files

ARM: dts: aspeed: mtjade: Add some gpios 



Add S0_SCP_AUTH_FAIL, S1_SCP_AUTH_FAIL gpios to indicates firmware
authentication fail on each socket.

Add gpio RTC_BAT_SEN_EN to enable RTC battery adc sensor.

Add BMC_I2C4_O_EN gpio to go high at boot to enable access to I2C4 bus.

Signed-off-by: default avatarQuan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: default avatarThang Nguyen <thang@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20210917082945.19111-1-quan@os.amperecomputing.com


Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent eaad4046

arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts

+20 −1
Original line number Diff line number Diff line
@@ -86,6 +86,18 @@ 
			linux,code = <ASPEED_GPIO(J, 1)>;

		};



		S0_scp_auth_fail {

			label = "S0_SCP_AUTH_FAIL";

			gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;

			linux,code = <ASPEED_GPIO(J, 2)>;

		};



		S1_scp_auth_fail {

			label = "S1_SCP_AUTH_FAIL";

			gpios = <&gpio ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;

			linux,code = <ASPEED_GPIO(Z, 5)>;

		};



		S1_overtemp {

			label = "S1_OVERTEMP";

			gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
@@ -590,7 +602,7 @@ 
	/*Q0-Q7*/	"","","","","","UID_BUTTON","","",

	/*R0-R7*/	"","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",

			"OCP_MAIN_PWREN","RESET_BUTTON","","",

	/*S0-S7*/	"","","","","","","","",

	/*S0-S7*/	"","","","","RTC_BAT_SEN_EN","","","",

	/*T0-T7*/	"","","","","","","","",

	/*U0-U7*/	"","","","","","","","",

	/*V0-V7*/	"","","","","","","","",
@@ -604,4 +616,11 @@ 
			"S1_BMC_DDR_ADR","","","","",

	/*AC0-AC7*/	"SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",

			"BMC_OCP_PG";



	i2c4_o_en {

		gpio-hog;

		gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;

		output-high;

		line-name = "BMC_I2C4_O_EN";

	};

};