Commit 0b0fa57a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mips_5.18_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux 

Pull MIPS fixes from Thomas Bogendoerfer:

 - build fix for gpio

 - fix crc32 build problems

 - check for failed memory allocations

* tag 'mips_5.18_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: crypto: Fix CRC32 code
  MIPS: rb532: move GPIOD definition into C-files
  MIPS: lantiq: check the return value of kzalloc()
  mips: sgi-ip22: add a check for the return of kzalloc()
parents 38904911 41022eff

arch/mips/crypto/crc32-mips.c

+26 −20
Original line number Diff line number Diff line
@@ -28,7 +28,7 @@ enum crc_type { 
};



#ifndef TOOLCHAIN_SUPPORTS_CRC

#define _ASM_MACRO_CRC32(OP, SZ, TYPE)					  \

#define _ASM_SET_CRC(OP, SZ, TYPE)					  \

_ASM_MACRO_3R(OP, rt, rs, rt2,						  \

	".ifnc	\\rt, \\rt2\n\t"					  \

	".error	\"invalid operands \\\"" #OP " \\rt,\\rs,\\rt2\\\"\"\n\t" \
@@ -37,30 +37,36 @@ _ASM_MACRO_3R(OP, rt, rs, rt2, \ 
			  ((SZ) <<  6) | ((TYPE) << 8))			  \

	_ASM_INSN32_IF_MM(0x00000030 | (__rs << 16) | (__rt << 21) |	  \

			  ((SZ) << 14) | ((TYPE) << 3)))

_ASM_MACRO_CRC32(crc32b,  0, 0);

_ASM_MACRO_CRC32(crc32h,  1, 0);

_ASM_MACRO_CRC32(crc32w,  2, 0);

_ASM_MACRO_CRC32(crc32d,  3, 0);

_ASM_MACRO_CRC32(crc32cb, 0, 1);

_ASM_MACRO_CRC32(crc32ch, 1, 1);

_ASM_MACRO_CRC32(crc32cw, 2, 1);

_ASM_MACRO_CRC32(crc32cd, 3, 1);

#define _ASM_SET_CRC ""

#define _ASM_UNSET_CRC(op, SZ, TYPE) ".purgem " #op "\n\t"

#else /* !TOOLCHAIN_SUPPORTS_CRC */

#define _ASM_SET_CRC ".set\tcrc\n\t"

#define _ASM_SET_CRC(op, SZ, TYPE) ".set\tcrc\n\t"

#define _ASM_UNSET_CRC(op, SZ, TYPE)

#endif



#define _CRC32(crc, value, size, type)		\

#define __CRC32(crc, value, op, SZ, TYPE)		\

do {							\

	__asm__ __volatile__(				\

		".set	push\n\t"			\

		_ASM_SET_CRC			\

		#type #size "	%0, %1, %0\n\t"	\

		_ASM_SET_CRC(op, SZ, TYPE)		\

		#op "	%0, %1, %0\n\t"			\

		_ASM_UNSET_CRC(op, SZ, TYPE)		\

		".set	pop"				\

		: "+r" (crc)				\

		: "r" (value));				\

} while (0)



#define _CRC32_crc32b(crc, value)	__CRC32(crc, value, crc32b, 0, 0)

#define _CRC32_crc32h(crc, value)	__CRC32(crc, value, crc32h, 1, 0)

#define _CRC32_crc32w(crc, value)	__CRC32(crc, value, crc32w, 2, 0)

#define _CRC32_crc32d(crc, value)	__CRC32(crc, value, crc32d, 3, 0)

#define _CRC32_crc32cb(crc, value)	__CRC32(crc, value, crc32cb, 0, 1)

#define _CRC32_crc32ch(crc, value)	__CRC32(crc, value, crc32ch, 1, 1)

#define _CRC32_crc32cw(crc, value)	__CRC32(crc, value, crc32cw, 2, 1)

#define _CRC32_crc32cd(crc, value)	__CRC32(crc, value, crc32cd, 3, 1)



#define _CRC32(crc, value, size, op) \

	_CRC32_##op##size(crc, value)



#define CRC32(crc, value, size) \

	_CRC32(crc, value, size, crc32)

arch/mips/include/asm/mach-rc32434/rb.h

+0 −9
Original line number Diff line number Diff line
@@ -29,15 +29,6 @@ 
#define DEV3TC		0x01003C

#define BTCS		0x010040

#define BTCOMPARE	0x010044

#define GPIOBASE	0x050000

/* Offsets relative to GPIOBASE */

#define GPIOFUNC	0x00

#define GPIOCFG		0x04

#define GPIOD		0x08

#define GPIOILEVEL	0x0C

#define GPIOISTAT	0x10

#define GPIONMIEN	0x14

#define IMASK6		0x38

#define LO_WPX		(1 << 0)

#define LO_ALE		(1 << 1)

#define LO_CLE		(1 << 2)

arch/mips/lantiq/falcon/sysctrl.c

+2 −0
Original line number Diff line number Diff line
@@ -167,6 +167,8 @@ static inline void clkdev_add_sys(const char *dev, unsigned int module, 
{

	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);



	if (!clk)

		return;

	clk->cl.dev_id = dev;

	clk->cl.con_id = NULL;

	clk->cl.clk = clk;

arch/mips/lantiq/xway/gptu.c

+2 −0
Original line number Diff line number Diff line
@@ -122,6 +122,8 @@ static inline void clkdev_add_gptu(struct device *dev, const char *con, 
{

	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);



	if (!clk)

		return;

	clk->cl.dev_id = dev_name(dev);

	clk->cl.con_id = con;

	clk->cl.clk = clk;

arch/mips/lantiq/xway/sysctrl.c

+30 −16
Original line number Diff line number Diff line
@@ -315,6 +315,8 @@ static void clkdev_add_pmu(const char *dev, const char *con, bool deactivate, 
{

	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);



	if (!clk)

		return;

	clk->cl.dev_id = dev;

	clk->cl.con_id = con;

	clk->cl.clk = clk;
@@ -338,6 +340,8 @@ static void clkdev_add_cgu(const char *dev, const char *con, 
{

	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);



	if (!clk)

		return;

	clk->cl.dev_id = dev;

	clk->cl.con_id = con;

	clk->cl.clk = clk;
@@ -356,6 +360,7 @@ static void clkdev_add_pci(void) 
	struct clk *clk_ext = kzalloc(sizeof(struct clk), GFP_KERNEL);



	/* main pci clock */

	if (clk) {

		clk->cl.dev_id = "17000000.pci";

		clk->cl.con_id = NULL;

		clk->cl.clk = clk;
@@ -366,8 +371,10 @@ static void clkdev_add_pci(void) 
		clk->module = 0;

		clk->bits = PMU_PCI;

		clkdev_add(&clk->cl);

	}



	/* use internal/external bus clock */

	if (clk_ext) {

		clk_ext->cl.dev_id = "17000000.pci";

		clk_ext->cl.con_id = "external";

		clk_ext->cl.clk = clk_ext;
@@ -375,6 +382,7 @@ static void clkdev_add_pci(void) 
		clk_ext->disable = pci_ext_disable;

		clkdev_add(&clk_ext->cl);

	}

}



/* xway socs can generate clocks on gpio pins */

static unsigned long valid_clkout_rates[4][5] = {
@@ -393,9 +401,15 @@ static void clkdev_add_clkout(void) 
		char *name;



		name = kzalloc(sizeof("clkout0"), GFP_KERNEL);

		if (!name)

			continue;

		sprintf(name, "clkout%d", i);



		clk = kzalloc(sizeof(struct clk), GFP_KERNEL);

		if (!clk) {

			kfree(name);

			continue;

		}

		clk->cl.dev_id = "1f103000.cgu";

		clk->cl.con_id = name;

		clk->cl.clk = clk;