Loading drivers/net/sfc/falcon.c +9 −1 Original line number Diff line number Diff line Loading @@ -2345,7 +2345,8 @@ static void falcon_remove_port(struct efx_nic *efx) * **************************************************************************/ int falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out) static int falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out) { struct falcon_nvconfig *nvconfig; struct efx_spi_device *spi; Loading Loading @@ -2408,6 +2409,11 @@ int falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out) return rc; } static int falcon_test_nvram(struct efx_nic *efx) { return falcon_read_nvram(efx, NULL); } /* Registers tested in the falcon register test */ static struct { unsigned address; Loading Loading @@ -3290,6 +3296,7 @@ struct efx_nic_type falcon_a1_nic_type = { .get_wol = falcon_get_wol, .set_wol = falcon_set_wol, .resume_wol = efx_port_dummy_op_void, .test_nvram = falcon_test_nvram, .default_mac_ops = &falcon_xmac_operations, .revision = EFX_REV_FALCON_A1, Loading Loading @@ -3328,6 +3335,7 @@ struct efx_nic_type falcon_b0_nic_type = { .set_wol = falcon_set_wol, .resume_wol = efx_port_dummy_op_void, .test_registers = falcon_b0_test_registers, .test_nvram = falcon_test_nvram, .default_mac_ops = &falcon_xmac_operations, .revision = EFX_REV_FALCON_B0, Loading drivers/net/sfc/falcon.h +0 −3 Original line number Diff line number Diff line Loading @@ -151,9 +151,6 @@ extern void falcon_stop_nic_stats(struct efx_nic *efx); extern int falcon_reset_xaui(struct efx_nic *efx); /* Tests */ struct falcon_nvconfig; extern int falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig); /************************************************************************** * Loading drivers/net/sfc/net_driver.h +2 −0 Original line number Diff line number Diff line Loading @@ -865,6 +865,7 @@ static inline const char *efx_dev_name(struct efx_nic *efx) * @set_wol: Push WoL configuration to the NIC * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume) * @test_registers: Test read/write functionality of control registers * @test_nvram: Test validity of NVRAM contents * @default_mac_ops: efx_mac_operations to set at startup * @revision: Hardware architecture revision * @mem_map_size: Memory BAR mapped size Loading Loading @@ -904,6 +905,7 @@ struct efx_nic_type { int (*set_wol)(struct efx_nic *efx, u32 type); void (*resume_wol)(struct efx_nic *efx); int (*test_registers)(struct efx_nic *efx); int (*test_nvram)(struct efx_nic *efx); struct efx_mac_operations *default_mac_ops; int revision; Loading drivers/net/sfc/selftest.c +6 −3 Original line number Diff line number Diff line Loading @@ -113,10 +113,13 @@ static int efx_test_mdio(struct efx_nic *efx, struct efx_self_tests *tests) static int efx_test_nvram(struct efx_nic *efx, struct efx_self_tests *tests) { int rc; int rc = 0; rc = falcon_read_nvram(efx, NULL); if (efx->type->test_nvram) { rc = efx->type->test_nvram(efx); tests->nvram = rc ? -1 : 1; } return rc; } Loading Loading
drivers/net/sfc/falcon.c +9 −1 Original line number Diff line number Diff line Loading @@ -2345,7 +2345,8 @@ static void falcon_remove_port(struct efx_nic *efx) * **************************************************************************/ int falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out) static int falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out) { struct falcon_nvconfig *nvconfig; struct efx_spi_device *spi; Loading Loading @@ -2408,6 +2409,11 @@ int falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out) return rc; } static int falcon_test_nvram(struct efx_nic *efx) { return falcon_read_nvram(efx, NULL); } /* Registers tested in the falcon register test */ static struct { unsigned address; Loading Loading @@ -3290,6 +3296,7 @@ struct efx_nic_type falcon_a1_nic_type = { .get_wol = falcon_get_wol, .set_wol = falcon_set_wol, .resume_wol = efx_port_dummy_op_void, .test_nvram = falcon_test_nvram, .default_mac_ops = &falcon_xmac_operations, .revision = EFX_REV_FALCON_A1, Loading Loading @@ -3328,6 +3335,7 @@ struct efx_nic_type falcon_b0_nic_type = { .set_wol = falcon_set_wol, .resume_wol = efx_port_dummy_op_void, .test_registers = falcon_b0_test_registers, .test_nvram = falcon_test_nvram, .default_mac_ops = &falcon_xmac_operations, .revision = EFX_REV_FALCON_B0, Loading
drivers/net/sfc/falcon.h +0 −3 Original line number Diff line number Diff line Loading @@ -151,9 +151,6 @@ extern void falcon_stop_nic_stats(struct efx_nic *efx); extern int falcon_reset_xaui(struct efx_nic *efx); /* Tests */ struct falcon_nvconfig; extern int falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig); /************************************************************************** * Loading
drivers/net/sfc/net_driver.h +2 −0 Original line number Diff line number Diff line Loading @@ -865,6 +865,7 @@ static inline const char *efx_dev_name(struct efx_nic *efx) * @set_wol: Push WoL configuration to the NIC * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume) * @test_registers: Test read/write functionality of control registers * @test_nvram: Test validity of NVRAM contents * @default_mac_ops: efx_mac_operations to set at startup * @revision: Hardware architecture revision * @mem_map_size: Memory BAR mapped size Loading Loading @@ -904,6 +905,7 @@ struct efx_nic_type { int (*set_wol)(struct efx_nic *efx, u32 type); void (*resume_wol)(struct efx_nic *efx); int (*test_registers)(struct efx_nic *efx); int (*test_nvram)(struct efx_nic *efx); struct efx_mac_operations *default_mac_ops; int revision; Loading
drivers/net/sfc/selftest.c +6 −3 Original line number Diff line number Diff line Loading @@ -113,10 +113,13 @@ static int efx_test_mdio(struct efx_nic *efx, struct efx_self_tests *tests) static int efx_test_nvram(struct efx_nic *efx, struct efx_self_tests *tests) { int rc; int rc = 0; rc = falcon_read_nvram(efx, NULL); if (efx->type->test_nvram) { rc = efx->type->test_nvram(efx); tests->nvram = rc ? -1 : 1; } return rc; } Loading