Commit 0a7b6d22 authored by Jie Wang's avatar Jie Wang Committed by David S. Miller
Browse files

net: hns3: create new cmdq hardware description structure hclge_comm_hw 



Currently PF and VF cmdq APIs use struct hclge(vf)_hw to describe cmdq
hardware information needed by hclge(vf)_cmd_send. There are a little
differences between its child struct hclge_cmq_ring and hclgevf_cmq_ring.
It is redundent to use two sets of structures to support same functions.

So this patch creates new set of common cmdq hardware description
structures(hclge_comm_hw) to unify PF and VF cmdq functions. The struct
hclge_desc is still kept to avoid too many meaningless replacement.

These new structures will be used to unify hclge(vf)_hw structures in PF
and VF cmdq APIs in next patches.

Signed-off-by: default avatarJie Wang <wangjie125@huawei.com>
Signed-off-by: default avatarGuangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5f20be4e

drivers/net/ethernet/hisilicon/hns3/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
ccflags-y += -I$(srctree)/$(src)

ccflags-y += -I$(srctree)/drivers/net/ethernet/hisilicon/hns3/hns3pf

ccflags-y += -I$(srctree)/drivers/net/ethernet/hisilicon/hns3/hns3vf

ccflags-y += -I$(srctree)/drivers/net/ethernet/hisilicon/hns3/hns3_common



obj-$(CONFIG_HNS3) += hnae3.o

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h

0 → 100644
+55 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0+ */

// Copyright (c) 2021-2021 Hisilicon Limited.



#ifndef __HCLGE_COMM_CMD_H

#define __HCLGE_COMM_CMD_H

#include <linux/types.h>



#include "hnae3.h"



#define HCLGE_DESC_DATA_LEN		6

struct hclge_desc {

	__le16 opcode;

	__le16 flag;

	__le16 retval;

	__le16 rsv;

	__le32 data[HCLGE_DESC_DATA_LEN];

};



struct hclge_comm_cmq_ring {

	dma_addr_t desc_dma_addr;

	struct hclge_desc *desc;

	struct pci_dev *pdev;

	u32 head;

	u32 tail;



	u16 buf_size;

	u16 desc_num;

	int next_to_use;

	int next_to_clean;

	u8 ring_type; /* cmq ring type */

	spinlock_t lock; /* Command queue lock */

};



enum hclge_comm_cmd_status {

	HCLGE_COMM_STATUS_SUCCESS	= 0,

	HCLGE_COMM_ERR_CSQ_FULL		= -1,

	HCLGE_COMM_ERR_CSQ_TIMEOUT	= -2,

	HCLGE_COMM_ERR_CSQ_ERROR	= -3,

};



struct hclge_comm_cmq {

	struct hclge_comm_cmq_ring csq;

	struct hclge_comm_cmq_ring crq;

	u16 tx_timeout;

	enum hclge_comm_cmd_status last_status;

};



struct hclge_comm_hw {

	void __iomem *io_base;

	void __iomem *mem_base;

	struct hclge_comm_cmq cmq;

	unsigned long comm_state;

};



#endif

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h

+1 −8
Original line number Diff line number Diff line
@@ -7,24 +7,17 @@ 
#include <linux/io.h>

#include <linux/etherdevice.h>

#include "hnae3.h"

#include "hclge_comm_cmd.h"



#define HCLGE_CMDQ_TX_TIMEOUT		30000

#define HCLGE_CMDQ_CLEAR_WAIT_TIME	200

#define HCLGE_DESC_DATA_LEN		6



struct hclge_dev;

struct hclge_desc {

	__le16 opcode;



#define HCLGE_CMDQ_RX_INVLD_B		0

#define HCLGE_CMDQ_RX_OUTVLD_B		1



	__le16 flag;

	__le16 retval;

	__le16 rsv;

	__le32 data[HCLGE_DESC_DATA_LEN];

};



struct hclge_cmq_ring {

	dma_addr_t desc_dma_addr;

	struct hclge_desc *desc;