Commit 0a575497 authored by Helge Deller's avatar Helge Deller
Browse files

parisc: Avoid calling SMP cache flush functions on cache-less machines 



At least the qemu virtual machine does not provide D- and I-caches,
so skip triggering SMP irqs to flush caches on such machines.

Further optimize the caching code by using static branches and making
some functions static.

Signed-off-by: default avatarHelge Deller <deller@gmx.de>
parent a58e9d09

arch/parisc/include/asm/cacheflush.h

+5 −10
Original line number Diff line number Diff line
@@ -9,16 +9,11 @@ 
/* The usual comment is "Caches aren't brain-dead on the <architecture>".

 * Unfortunately, that doesn't apply to PA-RISC. */



/* Internal implementation */

void flush_data_cache_local(void *);  /* flushes local data-cache only */

void flush_instruction_cache_local(void *); /* flushes local code-cache only */

#ifdef CONFIG_SMP

void flush_data_cache(void); /* flushes data-cache only (all processors) */

void flush_instruction_cache(void); /* flushes i-cache only (all processors) */

#else

#define flush_data_cache() flush_data_cache_local(NULL)

#define flush_instruction_cache() flush_instruction_cache_local(NULL)

#endif

#include <linux/jump_label.h>



DECLARE_STATIC_KEY_TRUE(parisc_has_cache);

DECLARE_STATIC_KEY_TRUE(parisc_has_dcache);

DECLARE_STATIC_KEY_TRUE(parisc_has_icache);



#define flush_cache_dup_mm(mm) flush_cache_mm(mm)

arch/parisc/kernel/alternative.c

+10 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include <asm/processor.h>

#include <asm/sections.h>

#include <asm/alternative.h>

#include <asm/cacheflush.h>



#include <linux/module.h>
@@ -107,5 +108,14 @@ void __init apply_alternatives_all(void) 
	apply_alternatives((struct alt_instr *) &__alt_instructions,

		(struct alt_instr *) &__alt_instructions_end, NULL);



	if (cache_info.dc_size == 0 && cache_info.ic_size == 0) {

		pr_info("alternatives: optimizing cache-flushes.\n");

		static_branch_disable(&parisc_has_cache);

	}

	if (cache_info.dc_size == 0)

		static_branch_disable(&parisc_has_dcache);

	if (cache_info.ic_size == 0)

		static_branch_disable(&parisc_has_icache);



	set_kernel_text_rw(0);

}

arch/parisc/kernel/cache.c

+25 −24
Original line number Diff line number Diff line
@@ -38,6 +38,9 @@ EXPORT_SYMBOL(flush_dcache_page_asm); 
void purge_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr);

void flush_icache_page_asm(unsigned long phys_addr, unsigned long vaddr);



/* Internal implementation in arch/parisc/kernel/pacache.S */

void flush_data_cache_local(void *);  /* flushes local data-cache only */

void flush_instruction_cache_local(void); /* flushes local code-cache only */



/* On some machines (i.e., ones with the Merced bus), there can be

 * only a single PxTLB broadcast at a time; this must be guaranteed
@@ -58,26 +61,35 @@ struct pdc_cache_info cache_info __ro_after_init; 
static struct pdc_btlb_info btlb_info __ro_after_init;

#endif



#ifdef CONFIG_SMP

void

flush_data_cache(void)

DEFINE_STATIC_KEY_TRUE(parisc_has_cache);

DEFINE_STATIC_KEY_TRUE(parisc_has_dcache);

DEFINE_STATIC_KEY_TRUE(parisc_has_icache);



static void cache_flush_local_cpu(void *dummy)

{

	on_each_cpu(flush_data_cache_local, NULL, 1);

	if (static_branch_likely(&parisc_has_icache))

		flush_instruction_cache_local();

	if (static_branch_likely(&parisc_has_dcache))

		flush_data_cache_local(NULL);

}

void 

flush_instruction_cache(void)



void flush_cache_all_local(void)

{

	on_each_cpu(flush_instruction_cache_local, NULL, 1);

	cache_flush_local_cpu(NULL);

}

#endif



void

flush_cache_all_local(void)

void flush_cache_all(void)

{

	flush_instruction_cache_local(NULL);

	flush_data_cache_local(NULL);

	if (static_branch_likely(&parisc_has_cache))

		on_each_cpu(cache_flush_local_cpu, NULL, 1);

}



static inline void flush_data_cache(void)

{

	if (static_branch_likely(&parisc_has_dcache))

		on_each_cpu(flush_data_cache_local, NULL, 1);

}

EXPORT_SYMBOL(flush_cache_all_local);





/* Virtual address of pfn.  */

#define pfn_va(pfn)	__va(PFN_PHYS(pfn))
@@ -375,7 +387,6 @@ EXPORT_SYMBOL(flush_dcache_page); 


/* Defined in arch/parisc/kernel/pacache.S */

EXPORT_SYMBOL(flush_kernel_dcache_range_asm);

EXPORT_SYMBOL(flush_data_cache_local);

EXPORT_SYMBOL(flush_kernel_icache_range_asm);



#define FLUSH_THRESHOLD 0x80000 /* 0.5MB */
@@ -517,16 +528,6 @@ int __flush_tlb_range(unsigned long sid, unsigned long start, 
	return 0;

}



static void cacheflush_h_tmp_function(void *dummy)

{

	flush_cache_all_local();

}



void flush_cache_all(void)

{

	on_each_cpu(cacheflush_h_tmp_function, NULL, 1);

}



static inline unsigned long mm_total_size(struct mm_struct *mm)

{

	struct vm_area_struct *vma;