Commit 09db4678 authored by William Breathitt Gray's avatar William Breathitt Gray Committed by Jonathan Cameron
Browse files

counter: 104-quad-8: Replace mutex with spinlock 



This patch replaces the mutex I/O lock with a spinlock. This is in
preparation for a subsequent patch adding IRQ support for 104-QUAD-8
devices; we can't sleep in an interrupt context, so we'll need to use a
spinlock instead.

Acked-by: default avatarSyed Nayyar Waris <syednwaris@gmail.com>
Signed-off-by: default avatarWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Link: https://lore.kernel.org/r/3f74491dec66de10d062978bcb7b9c2b3bdea86c.1632884256.git.vilhelm.gray@gmail.com


Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent feff17a5

drivers/counter/104-quad-8.c

+52 −37
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#include <linux/module.h>

#include <linux/moduleparam.h>

#include <linux/types.h>

#include <linux/spinlock.h>



#define QUAD8_EXTENT 32
@@ -43,7 +44,7 @@ MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses"); 
 * @base:		base port address of the device

 */

struct quad8 {

	struct mutex lock;

	spinlock_t lock;

	struct counter_device counter;

	unsigned int fck_prescaler[QUAD8_NUM_COUNTERS];

	unsigned int preset[QUAD8_NUM_COUNTERS];
@@ -124,6 +125,7 @@ static int quad8_count_read(struct counter_device *counter, 
	unsigned int flags;

	unsigned int borrow;

	unsigned int carry;

	unsigned long irqflags;

	int i;



	flags = inb(base_offset + 1);
@@ -133,7 +135,7 @@ static int quad8_count_read(struct counter_device *counter, 
	/* Borrow XOR Carry effectively doubles count range */

	*val = (unsigned long)(borrow ^ carry) << 24;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	/* Reset Byte Pointer; transfer Counter to Output Latch */

	outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_CNTR_OUT,
@@ -142,7 +144,7 @@ static int quad8_count_read(struct counter_device *counter, 
	for (i = 0; i < 3; i++)

		*val |= (unsigned long)inb(base_offset) << (8 * i);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -152,13 +154,14 @@ static int quad8_count_write(struct counter_device *counter, 
{

	struct quad8 *const priv = counter->priv;

	const int base_offset = priv->base + 2 * count->id;

	unsigned long irqflags;

	int i;



	/* Only 24-bit values are supported */

	if (val > 0xFFFFFF)

		return -ERANGE;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	/* Reset Byte Pointer */

	outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
@@ -183,7 +186,7 @@ static int quad8_count_write(struct counter_device *counter, 
	/* Reset Error flag */

	outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_E, base_offset + 1);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -201,8 +204,9 @@ static int quad8_function_read(struct counter_device *counter, 
{

	struct quad8 *const priv = counter->priv;

	const int id = count->id;

	unsigned long irqflags;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	if (priv->quadrature_mode[id])

		switch (priv->quadrature_scale[id]) {
@@ -219,7 +223,7 @@ static int quad8_function_read(struct counter_device *counter, 
	else

		*function = COUNTER_FUNCTION_PULSE_DIRECTION;



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -234,10 +238,11 @@ static int quad8_function_write(struct counter_device *counter, 
	unsigned int *const scale = priv->quadrature_scale + id;

	unsigned int *const synchronous_mode = priv->synchronous_mode + id;

	const int base_offset = priv->base + 2 * id + 1;

	unsigned long irqflags;

	unsigned int mode_cfg;

	unsigned int idr_cfg;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	mode_cfg = priv->count_mode[id] << 1;

	idr_cfg = priv->index_polarity[id] << 1;
@@ -272,7 +277,7 @@ static int quad8_function_write(struct counter_device *counter, 
			break;

		default:

			/* should never reach this path */

			mutex_unlock(&priv->lock);

			spin_unlock_irqrestore(&priv->lock, irqflags);

			return -EINVAL;

		}

	}
@@ -280,7 +285,7 @@ static int quad8_function_write(struct counter_device *counter, 
	/* Load mode configuration to Counter Mode Register */

	outb(QUAD8_CTR_CMR | mode_cfg, base_offset);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -406,9 +411,10 @@ static int quad8_index_polarity_set(struct counter_device *counter, 
	struct quad8 *const priv = counter->priv;

	const size_t channel_id = signal->id - 16;

	const int base_offset = priv->base + 2 * channel_id + 1;

	unsigned long irqflags;

	unsigned int idr_cfg = index_polarity << 1;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	idr_cfg |= priv->synchronous_mode[channel_id];
@@ -417,7 +423,7 @@ static int quad8_index_polarity_set(struct counter_device *counter, 
	/* Load Index Control configuration to Index Control Register */

	outb(QUAD8_CTR_IDR | idr_cfg, base_offset);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -446,15 +452,16 @@ static int quad8_synchronous_mode_set(struct counter_device *counter, 
	struct quad8 *const priv = counter->priv;

	const size_t channel_id = signal->id - 16;

	const int base_offset = priv->base + 2 * channel_id + 1;

	unsigned long irqflags;

	unsigned int idr_cfg = synchronous_mode;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	idr_cfg |= priv->index_polarity[channel_id] << 1;



	/* Index function must be non-synchronous in non-quadrature mode */

	if (synchronous_mode && !priv->quadrature_mode[channel_id]) {

		mutex_unlock(&priv->lock);

		spin_unlock_irqrestore(&priv->lock, irqflags);

		return -EINVAL;

	}
@@ -463,7 +470,7 @@ static int quad8_synchronous_mode_set(struct counter_device *counter, 
	/* Load Index Control configuration to Index Control Register */

	outb(QUAD8_CTR_IDR | idr_cfg, base_offset);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -510,6 +517,7 @@ static int quad8_count_mode_write(struct counter_device *counter, 
	unsigned int count_mode;

	unsigned int mode_cfg;

	const int base_offset = priv->base + 2 * count->id + 1;

	unsigned long irqflags;



	/* Map Generic Counter count mode to 104-QUAD-8 count mode */

	switch (cnt_mode) {
@@ -530,7 +538,7 @@ static int quad8_count_mode_write(struct counter_device *counter, 
		return -EINVAL;

	}



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	priv->count_mode[count->id] = count_mode;
@@ -544,7 +552,7 @@ static int quad8_count_mode_write(struct counter_device *counter, 
	/* Load mode configuration to Counter Mode Register */

	outb(QUAD8_CTR_CMR | mode_cfg, base_offset);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -564,9 +572,10 @@ static int quad8_count_enable_write(struct counter_device *counter, 
{

	struct quad8 *const priv = counter->priv;

	const int base_offset = priv->base + 2 * count->id;

	unsigned long irqflags;

	unsigned int ior_cfg;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	priv->ab_enable[count->id] = enable;
@@ -575,7 +584,7 @@ static int quad8_count_enable_write(struct counter_device *counter, 
	/* Load I/O control configuration */

	outb(QUAD8_CTR_IOR | ior_cfg, base_offset + 1);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -626,16 +635,17 @@ static int quad8_count_preset_write(struct counter_device *counter, 
				    struct counter_count *count, u64 preset)

{

	struct quad8 *const priv = counter->priv;

	unsigned long irqflags;



	/* Only 24-bit values are supported */

	if (preset > 0xFFFFFF)

		return -ERANGE;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	quad8_preset_register_set(priv, count->id, preset);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -644,8 +654,9 @@ static int quad8_count_ceiling_read(struct counter_device *counter, 
				    struct counter_count *count, u64 *ceiling)

{

	struct quad8 *const priv = counter->priv;

	unsigned long irqflags;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	/* Range Limit and Modulo-N count modes use preset value as ceiling */

	switch (priv->count_mode[count->id]) {
@@ -659,7 +670,7 @@ static int quad8_count_ceiling_read(struct counter_device *counter, 
		break;

	}



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -668,23 +679,24 @@ static int quad8_count_ceiling_write(struct counter_device *counter, 
				     struct counter_count *count, u64 ceiling)

{

	struct quad8 *const priv = counter->priv;

	unsigned long irqflags;



	/* Only 24-bit values are supported */

	if (ceiling > 0xFFFFFF)

		return -ERANGE;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	/* Range Limit and Modulo-N count modes use preset value as ceiling */

	switch (priv->count_mode[count->id]) {

	case 1:

	case 3:

		quad8_preset_register_set(priv, count->id, ceiling);

		mutex_unlock(&priv->lock);

		spin_unlock_irqrestore(&priv->lock, irqflags);

		return 0;

	}



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return -EINVAL;

}
@@ -706,12 +718,13 @@ static int quad8_count_preset_enable_write(struct counter_device *counter, 
{

	struct quad8 *const priv = counter->priv;

	const int base_offset = priv->base + 2 * count->id + 1;

	unsigned long irqflags;

	unsigned int ior_cfg;



	/* Preset enable is active low in Input/Output Control register */

	preset_enable = !preset_enable;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	priv->preset_enable[count->id] = preset_enable;
@@ -720,7 +733,7 @@ static int quad8_count_preset_enable_write(struct counter_device *counter, 
	/* Load I/O control configuration to Input / Output Control Register */

	outb(QUAD8_CTR_IOR | ior_cfg, base_offset);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -731,22 +744,23 @@ static int quad8_signal_cable_fault_read(struct counter_device *counter, 
{

	struct quad8 *const priv = counter->priv;

	const size_t channel_id = signal->id / 2;

	unsigned long irqflags;

	bool disabled;

	unsigned int status;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	disabled = !(priv->cable_fault_enable & BIT(channel_id));



	if (disabled) {

		mutex_unlock(&priv->lock);

		spin_unlock_irqrestore(&priv->lock, irqflags);

		return -EINVAL;

	}



	/* Logic 0 = cable fault */

	status = inb(priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	/* Mask respective channel and invert logic */

	*cable_fault = !(status & BIT(channel_id));
@@ -772,9 +786,10 @@ static int quad8_signal_cable_fault_enable_write(struct counter_device *counter, 
{

	struct quad8 *const priv = counter->priv;

	const size_t channel_id = signal->id / 2;

	unsigned long irqflags;

	unsigned int cable_fault_enable;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	if (enable)

		priv->cable_fault_enable |= BIT(channel_id);
@@ -786,7 +801,7 @@ static int quad8_signal_cable_fault_enable_write(struct counter_device *counter, 


	outb(cable_fault_enable, priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -809,8 +824,9 @@ static int quad8_signal_fck_prescaler_write(struct counter_device *counter, 
	struct quad8 *const priv = counter->priv;

	const size_t channel_id = signal->id / 2;

	const int base_offset = priv->base + 2 * channel_id;

	unsigned long irqflags;



	mutex_lock(&priv->lock);

	spin_lock_irqsave(&priv->lock, irqflags);



	priv->fck_prescaler[channel_id] = prescaler;
@@ -822,7 +838,7 @@ static int quad8_signal_fck_prescaler_write(struct counter_device *counter, 
	outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_PRESET_PSC,

	     base_offset + 1);



	mutex_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->lock, irqflags);



	return 0;

}
@@ -991,8 +1007,7 @@ static int quad8_probe(struct device *dev, unsigned int id) 
	priv->counter.priv = priv;

	priv->base = base[id];



	/* Initialize mutex */

	mutex_init(&priv->lock);

	spin_lock_init(&priv->lock);



	/* Reset all counters and disable interrupt function */

	outb(QUAD8_CHAN_OP_RESET_COUNTERS, base[id] + QUAD8_REG_CHAN_OP);