Commit 09d18556 authored by Alex Helms's avatar Alex Helms Committed by Stephen Boyd
Browse files

dt-bindings: Renesas versaclock7 device tree bindings 



Renesas Versaclock7 is a family of configurable clock generator ICs
with fractional and integer dividers. This driver has basic support
for the RC21008A device, a clock synthesizer with a crystal input and
8 outputs. The supports changing the FOD and IOD rates, and each
output can be gated.

Signed-off-by: default avatarAlex Helms <alexander.helms.jy@renesas.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220912183613.22213-2-alexander.helms.jy@renesas.com


Tested-by: default avatarSaeed Nowshadi <saeed.nowshadi@amd.com>
[sboyd@kernel.org: Rename nodes in example to generic names]
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 568035b0

Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/renesas,versaclock7.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Renesas Versaclock7 Programmable Clock Device Tree Bindings



maintainers:

  - Alex Helms <alexander.helms.jy@renesas.com>



description: |

  Renesas Versaclock7 is a family of configurable clock generator and

  jitter attenuator ICs with fractional and integer dividers.



properties:

  '#clock-cells':

    const: 1



  compatible:

    enum:

      - renesas,rc21008a



  reg:

    maxItems: 1



  clocks:

    items:

      - description: External crystal or oscillator



  clock-names:

    items:

      - const: xin



required:

  - '#clock-cells'

  - compatible

  - reg

  - clocks

  - clock-names



additionalProperties: false



examples:

  - |

    vc7_xin: clock {

        compatible = "fixed-clock";

        #clock-cells = <0>;

        clock-frequency = <49152000>;

    };



    i2c@0 {

        reg = <0x0 0x100>;

        #address-cells = <1>;

        #size-cells = <0>;



        vc7: clock-controller@9 {

            compatible = "renesas,rc21008a";

            reg = <0x9>;

            #clock-cells = <1>;

            clocks = <&vc7_xin>;

            clock-names = "xin";

        };

    };

MAINTAINERS

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@@ -17441,6 +17441,11 @@ S: Maintained 
F:	Documentation/devicetree/bindings/mtd/renesas-nandc.yaml

F:	drivers/mtd/nand/raw/renesas-nand-controller.c









RENESAS VERSACLOCK 7 CLOCK DRIVER









M:	Alex Helms <alexander.helms.jy@renesas.com>









S:	Maintained









F:	Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml

















RESET CONTROLLER FRAMEWORK









M:	Philipp Zabel <p.zabel@pengutronix.de>









S:	Maintained