Commit 09b8cd69 authored by Fabio Estevam's avatar Fabio Estevam Committed by Kalle Valo
Browse files

ath10k: Fix the MTU size on QCA9377 SDIO



On an imx6dl-pico-pi board with a QCA9377 SDIO chip, simply trying to
connect via ssh to another machine causes:

[   55.824159] ath10k_sdio mmc1:0001:1: failed to transmit packet, dropping: -12
[   55.832169] ath10k_sdio mmc1:0001:1: failed to submit frame: -12
[   55.838529] ath10k_sdio mmc1:0001:1: failed to push frame: -12
[   55.905863] ath10k_sdio mmc1:0001:1: failed to transmit packet, dropping: -12
[   55.913650] ath10k_sdio mmc1:0001:1: failed to submit frame: -12
[   55.919887] ath10k_sdio mmc1:0001:1: failed to push frame: -12

, leading to an ssh connection failure.

One user inspected the size of frames on Wireshark and reported
the followig:

"I was able to narrow the issue down to the mtu. If I set the mtu for
the wlan0 device to 1486 instead of 1500, the issue does not happen.

The size of frames that I see on Wireshark is exactly 1500 after
setting it to 1486."

Clearing the HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE avoids the problem and
the ssh command works successfully after that.

Introduce a 'credit_size_workaround' field to ath10k_hw_params for
the QCA9377 SDIO, so that the HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE
is not set in this case.

Tested with QCA9377 SDIO with firmware WLAN.TF.1.1.1-00061-QCATFSWPZ-1.

Fixes: 2f918ea9 ("ath10k: enable alt data of TX path for sdio")
Signed-off-by: default avatarFabio Estevam <festevam@denx.de>
Signed-off-by: default avatarKalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/20211124131047.713756-1-festevam@denx.de
parent a93789ae
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+18 −1
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = true,
		.dynamic_sar_support = false,
	},
@@ -125,6 +126,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = true,
		.dynamic_sar_support = false,
	},
@@ -161,6 +163,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.dynamic_sar_support = false,
	},
@@ -191,6 +194,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.num_wds_entries = 0x20,
		.uart_pin_workaround = true,
		.tx_stats_over_pktlog = false,
		.credit_size_workaround = false,
		.bmi_large_size_download = true,
		.supports_peer_stats_info = true,
		.dynamic_sar_support = true,
@@ -227,6 +231,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.dynamic_sar_support = false,
	},
@@ -262,6 +267,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.dynamic_sar_support = false,
	},
@@ -297,6 +303,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.dynamic_sar_support = false,
	},
@@ -335,6 +342,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = true,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.supports_peer_stats_info = true,
		.dynamic_sar_support = true,
@@ -377,6 +385,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.dynamic_sar_support = false,
	},
@@ -425,6 +434,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.dynamic_sar_support = false,
	},
@@ -470,6 +480,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.dynamic_sar_support = false,
	},
@@ -505,6 +516,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.dynamic_sar_support = false,
	},
@@ -542,6 +554,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = true,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.dynamic_sar_support = false,
	},
@@ -571,6 +584,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
		.uart_pin_workaround = true,
		.credit_size_workaround = true,
		.dynamic_sar_support = false,
	},
	{
@@ -612,6 +626,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = false,
		.hw_filter_reset_required = true,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.dynamic_sar_support = false,
	},
@@ -640,6 +655,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.rri_on_ddr = true,
		.hw_filter_reset_required = false,
		.fw_diag_ce_download = false,
		.credit_size_workaround = false,
		.tx_stats_over_pktlog = false,
		.dynamic_sar_support = true,
	},
@@ -715,6 +731,7 @@ static void ath10k_send_suspend_complete(struct ath10k *ar)

static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
{
	bool mtu_workaround = ar->hw_params.credit_size_workaround;
	int ret;
	u32 param = 0;

@@ -732,7 +749,7 @@ static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)

	param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;

	if (mode == ATH10K_FIRMWARE_MODE_NORMAL)
	if (mode == ATH10K_FIRMWARE_MODE_NORMAL && !mtu_workaround)
		param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
	else
		param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
+3 −0
Original line number Diff line number Diff line
@@ -618,6 +618,9 @@ struct ath10k_hw_params {
	 */
	bool uart_pin_workaround;

	/* Workaround for the credit size calculation */
	bool credit_size_workaround;

	/* tx stats support over pktlog */
	bool tx_stats_over_pktlog;