Loading Documentation/devicetree/bindings/sound/audio-graph-port.yaml +0 −3 Original line number Diff line number Diff line Loading @@ -71,9 +71,6 @@ properties: description: CPU to Codec rate channels. $ref: /schemas/types.yaml#/definitions/uint32 required: - remote-endpoint ports: description: multi OF-Graph subnode type: object Loading Documentation/devicetree/bindings/sound/ingenic,codec.yaml +8 −3 Original line number Diff line number Diff line Loading @@ -15,9 +15,14 @@ properties: compatible: oneOf: - const: ingenic,jz4770-codec - const: ingenic,jz4725b-codec - const: ingenic,jz4740-codec - enum: - ingenic,jz4770-codec - ingenic,jz4760-codec - ingenic,jz4725b-codec - ingenic,jz4740-codec - items: - const: ingenic,jz4760b-codec - const: ingenic,jz4760-codec reg: maxItems: 1 Loading Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml +13 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ properties: enum: - intel,keembay-i2s - intel,keembay-tdm - intel,keembay-hdmi-i2s "#sound-dai-cells": const: 0 Loading Loading @@ -45,6 +46,16 @@ properties: - const: osc - const: apb_clk dmas: items: - description: DMA TX channel - description: DMA RX channel dma-names: items: - const: tx - const: rx required: - compatible - "#sound-dai-cells" Loading @@ -70,4 +81,6 @@ examples: interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; clock-names = "osc", "apb_clk"; clocks = <&scmi_clk KEEM_BAY_PSS_AUX_I2S3>, <&scmi_clk KEEM_BAY_PSS_I2S3>; dmas = <&axi_dma0 29 &axi_dma0 33>; dma-names = "tx", "rx"; }; Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml +5 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,10 @@ properties: $ref: "/schemas/types.yaml#/definitions/phandle" description: The phandle of MT8192 ASoC platform. mediatek,hdmi-codec: $ref: "/schemas/types.yaml#/definitions/phandle" description: The phandle of HDMI codec. additionalProperties: false required: Loading @@ -35,6 +39,7 @@ examples: sound: mt8192-sound { compatible = "mediatek,mt8192_mt6359_rt1015_rt5682"; mediatek,platform = <&afe>; mediatek,hdmi-codec = <&anx_bridge_dp>; pinctrl-names = "aud_clk_mosi_off", "aud_clk_mosi_on"; pinctrl-0 = <&aud_clk_mosi_off>; Loading Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml 0 → 100644 +190 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Audio Graph based Tegra sound card driver description: | This is based on generic audio graph card driver along with additional customizations for Tegra platforms. It uses the same bindings with additional standard clock DT bindings required for Tegra. maintainers: - Jon Hunter <jonathanh@nvidia.com> - Sameer Pujar <spujar@nvidia.com> allOf: - $ref: audio-graph.yaml# properties: compatible: enum: - nvidia,tegra210-audio-graph-card - nvidia,tegra186-audio-graph-card clocks: minItems: 2 clock-names: minItems: 2 items: - const: pll_a - const: plla_out0 assigned-clocks: minItems: 1 maxItems: 3 assigned-clock-parents: minItems: 1 maxItems: 3 assigned-clock-rates: minItems: 1 maxItems: 3 iommus: maxItems: 1 required: - clocks - clock-names - assigned-clocks - assigned-clock-parents unevaluatedProperties: false examples: - | #include<dt-bindings/clock/tegra210-car.h> tegra_sound { compatible = "nvidia,tegra210-audio-graph-card"; clocks = <&tegra_car TEGRA210_CLK_PLL_A>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; clock-names = "pll_a", "plla_out0"; assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>, <&tegra_car TEGRA210_CLK_EXTERN1>; assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; assigned-clock-rates = <368640000>, <49152000>, <12288000>; dais = /* FE */ <&admaif1_port>, /* Router */ <&xbar_i2s1_port>, /* I/O DAP Ports */ <&i2s1_port>; label = "jetson-tx1-ape"; }; // The ports are defined for AHUB and its child devices. ahub@702d0800 { compatible = "nvidia,tegra210-ahub"; reg = <0x702d0800 0x800>; clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; clock-names = "ahub"; assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; #address-cells = <1>; #size-cells = <1>; ranges = <0x702d0000 0x702d0000 0x0000e400>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0x0>; xbar_admaif1_ep: endpoint { remote-endpoint = <&admaif1_ep>; }; }; // ... xbar_i2s1_port: port@a { reg = <0xa>; xbar_i2s1_ep: endpoint { remote-endpoint = <&i2s1_cif_ep>; }; }; }; admaif@702d0000 { compatible = "nvidia,tegra210-admaif"; reg = <0x702d0000 0x800>; dmas = <&adma 1>, <&adma 1>, <&adma 2>, <&adma 2>, <&adma 3>, <&adma 3>, <&adma 4>, <&adma 4>, <&adma 5>, <&adma 5>, <&adma 6>, <&adma 6>, <&adma 7>, <&adma 7>, <&adma 8>, <&adma 8>, <&adma 9>, <&adma 9>, <&adma 10>, <&adma 10>; dma-names = "rx1", "tx1", "rx2", "tx2", "rx3", "tx3", "rx4", "tx4", "rx5", "tx5", "rx6", "tx6", "rx7", "tx7", "rx8", "tx8", "rx9", "tx9", "rx10", "tx10"; ports { #address-cells = <1>; #size-cells = <0>; admaif1_port: port@0 { reg = <0x0>; admaif1_ep: endpoint { remote-endpoint = <&xbar_admaif1_ep>; }; }; // More ADMAIF ports to follow }; }; i2s@702d1000 { compatible = "nvidia,tegra210-i2s"; clocks = <&tegra_car TEGRA210_CLK_I2S0>; clock-names = "i2s"; assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>; assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; assigned-clock-rates = <1536000>; reg = <0x702d1000 0x100>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0x0>; i2s1_cif_ep: endpoint { remote-endpoint = <&xbar_i2s1_ep>; }; }; i2s1_port: port@1 { reg = <0x1>; i2s1_dap: endpoint { dai-format = "i2s"; }; }; }; }; }; ... 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Documentation/devicetree/bindings/sound/audio-graph-port.yaml +0 −3 Original line number Diff line number Diff line Loading @@ -71,9 +71,6 @@ properties: description: CPU to Codec rate channels. $ref: /schemas/types.yaml#/definitions/uint32 required: - remote-endpoint ports: description: multi OF-Graph subnode type: object Loading
Documentation/devicetree/bindings/sound/ingenic,codec.yaml +8 −3 Original line number Diff line number Diff line Loading @@ -15,9 +15,14 @@ properties: compatible: oneOf: - const: ingenic,jz4770-codec - const: ingenic,jz4725b-codec - const: ingenic,jz4740-codec - enum: - ingenic,jz4770-codec - ingenic,jz4760-codec - ingenic,jz4725b-codec - ingenic,jz4740-codec - items: - const: ingenic,jz4760b-codec - const: ingenic,jz4760-codec reg: maxItems: 1 Loading
Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml +13 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ properties: enum: - intel,keembay-i2s - intel,keembay-tdm - intel,keembay-hdmi-i2s "#sound-dai-cells": const: 0 Loading Loading @@ -45,6 +46,16 @@ properties: - const: osc - const: apb_clk dmas: items: - description: DMA TX channel - description: DMA RX channel dma-names: items: - const: tx - const: rx required: - compatible - "#sound-dai-cells" Loading @@ -70,4 +81,6 @@ examples: interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; clock-names = "osc", "apb_clk"; clocks = <&scmi_clk KEEM_BAY_PSS_AUX_I2S3>, <&scmi_clk KEEM_BAY_PSS_I2S3>; dmas = <&axi_dma0 29 &axi_dma0 33>; dma-names = "tx", "rx"; };
Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml +5 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,10 @@ properties: $ref: "/schemas/types.yaml#/definitions/phandle" description: The phandle of MT8192 ASoC platform. mediatek,hdmi-codec: $ref: "/schemas/types.yaml#/definitions/phandle" description: The phandle of HDMI codec. additionalProperties: false required: Loading @@ -35,6 +39,7 @@ examples: sound: mt8192-sound { compatible = "mediatek,mt8192_mt6359_rt1015_rt5682"; mediatek,platform = <&afe>; mediatek,hdmi-codec = <&anx_bridge_dp>; pinctrl-names = "aud_clk_mosi_off", "aud_clk_mosi_on"; pinctrl-0 = <&aud_clk_mosi_off>; Loading
Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml 0 → 100644 +190 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Audio Graph based Tegra sound card driver description: | This is based on generic audio graph card driver along with additional customizations for Tegra platforms. It uses the same bindings with additional standard clock DT bindings required for Tegra. maintainers: - Jon Hunter <jonathanh@nvidia.com> - Sameer Pujar <spujar@nvidia.com> allOf: - $ref: audio-graph.yaml# properties: compatible: enum: - nvidia,tegra210-audio-graph-card - nvidia,tegra186-audio-graph-card clocks: minItems: 2 clock-names: minItems: 2 items: - const: pll_a - const: plla_out0 assigned-clocks: minItems: 1 maxItems: 3 assigned-clock-parents: minItems: 1 maxItems: 3 assigned-clock-rates: minItems: 1 maxItems: 3 iommus: maxItems: 1 required: - clocks - clock-names - assigned-clocks - assigned-clock-parents unevaluatedProperties: false examples: - | #include<dt-bindings/clock/tegra210-car.h> tegra_sound { compatible = "nvidia,tegra210-audio-graph-card"; clocks = <&tegra_car TEGRA210_CLK_PLL_A>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; clock-names = "pll_a", "plla_out0"; assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>, <&tegra_car TEGRA210_CLK_EXTERN1>; assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; assigned-clock-rates = <368640000>, <49152000>, <12288000>; dais = /* FE */ <&admaif1_port>, /* Router */ <&xbar_i2s1_port>, /* I/O DAP Ports */ <&i2s1_port>; label = "jetson-tx1-ape"; }; // The ports are defined for AHUB and its child devices. ahub@702d0800 { compatible = "nvidia,tegra210-ahub"; reg = <0x702d0800 0x800>; clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; clock-names = "ahub"; assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; #address-cells = <1>; #size-cells = <1>; ranges = <0x702d0000 0x702d0000 0x0000e400>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0x0>; xbar_admaif1_ep: endpoint { remote-endpoint = <&admaif1_ep>; }; }; // ... xbar_i2s1_port: port@a { reg = <0xa>; xbar_i2s1_ep: endpoint { remote-endpoint = <&i2s1_cif_ep>; }; }; }; admaif@702d0000 { compatible = "nvidia,tegra210-admaif"; reg = <0x702d0000 0x800>; dmas = <&adma 1>, <&adma 1>, <&adma 2>, <&adma 2>, <&adma 3>, <&adma 3>, <&adma 4>, <&adma 4>, <&adma 5>, <&adma 5>, <&adma 6>, <&adma 6>, <&adma 7>, <&adma 7>, <&adma 8>, <&adma 8>, <&adma 9>, <&adma 9>, <&adma 10>, <&adma 10>; dma-names = "rx1", "tx1", "rx2", "tx2", "rx3", "tx3", "rx4", "tx4", "rx5", "tx5", "rx6", "tx6", "rx7", "tx7", "rx8", "tx8", "rx9", "tx9", "rx10", "tx10"; ports { #address-cells = <1>; #size-cells = <0>; admaif1_port: port@0 { reg = <0x0>; admaif1_ep: endpoint { remote-endpoint = <&xbar_admaif1_ep>; }; }; // More ADMAIF ports to follow }; }; i2s@702d1000 { compatible = "nvidia,tegra210-i2s"; clocks = <&tegra_car TEGRA210_CLK_I2S0>; clock-names = "i2s"; assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>; assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; assigned-clock-rates = <1536000>; reg = <0x702d1000 0x100>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0x0>; i2s1_cif_ep: endpoint { remote-endpoint = <&xbar_i2s1_ep>; }; }; i2s1_port: port@1 { reg = <0x1>; i2s1_dap: endpoint { dai-format = "i2s"; }; }; }; }; }; ...