Commit 094b10cb authored by Linus Walleij's avatar Linus Walleij Committed by Rob Herring
Browse files

dt-bindings: gnss: Add two more chips 



The CSR GSD4t is a CSR product using the SiRFstarIV core, and
the CSR CSRG05TA03-ICJE-R is a CSR product using the SiRFstarV
core.

These chips have a SRESETN line that can be pulled low to hard
reset the chip and in some designs this is connected to a GPIO,
so add this as an optional property.

Update the example with a reset line so users see that it need
to be tagged as active low.

Cc: devicetree@vger.kernel.org
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220317225844.1262643-4-linus.walleij@linaro.org
parent 5505409e

Documentation/devicetree/bindings/gnss/sirfstar.yaml

+8 −0
Original line number Diff line number Diff line
@@ -25,6 +25,8 @@ allOf: 
properties:

  compatible:

    enum:

      - csr,gsd4t

      - csr,csrg05ta03-icje-r

      - fastrax,uc430

      - linx,r4

      - wi2wi,w2sg0004
@@ -39,6 +41,11 @@ properties: 
    description:

      Main voltage regulator, pin names such as 3V3_IN, VCC, VDD.



  reset-gpios:

    maxItems: 1

    description: An optional active low reset line, should be flagged with

      GPIO_ACTIVE_LOW.



  sirf,onoff-gpios:

    maxItems: 1

    description: GPIO used to power on and off device, pin name ON_OFF.
@@ -61,6 +68,7 @@ examples: 
        gnss {

            compatible = "wi2wi,w2sg0084i";

            vcc-supply = <&gnss_vcc_reg>;

            reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;

            sirf,onoff-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;

            sirf,wakeup-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;

            current-speed = <38400>;