Commit 08f07e9a authored by Yann Gautier's avatar Yann Gautier Committed by Alexandre Torgue
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ARM: dts: stm32: update sdmmc IP version for STM32MP15



Update the IP version to v2.0, which supports linked lists in internal DMA,
and is present in STM32MP1 SoCs.

The mmci driver supports the v2.0 periph id since 7a2a98be ("mmc: mmci:
Add support for sdmmc variant revision 2.0"), so it's now Ok to add it into
the SoC device tree to benefit from the improved DMA support.

Signed-off-by: default avatarLudovic Barre <ludovic.barre@st.com>
Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
Signed-off-by: default avatarAhmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@st.com>
parent 4f551b7b
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+3 −3
Original line number Diff line number Diff line
@@ -1047,7 +1047,7 @@

		sdmmc3: sdmmc@48004000 {
			compatible = "arm,pl18x", "arm,primecell";
			arm,primecell-periphid = <0x10153180>;
			arm,primecell-periphid = <0x00253180>;
			reg = <0x48004000 0x400>;
			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "cmd_irq";
@@ -1360,7 +1360,7 @@

		sdmmc1: sdmmc@58005000 {
			compatible = "arm,pl18x", "arm,primecell";
			arm,primecell-periphid = <0x10153180>;
			arm,primecell-periphid = <0x00253180>;
			reg = <0x58005000 0x1000>;
			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "cmd_irq";
@@ -1375,7 +1375,7 @@

		sdmmc2: sdmmc@58007000 {
			compatible = "arm,pl18x", "arm,primecell";
			arm,primecell-periphid = <0x10153180>;
			arm,primecell-periphid = <0x00253180>;
			reg = <0x58007000 0x1000>;
			interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "cmd_irq";