Commit 08e4dd1d authored by Peter Rosin's avatar Peter Rosin Committed by Claudiu Beznea
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ARM: dts: at91: tse850: add properties for gpio-line-names 



Signal names are one-to-one copies from the schematics, except VBUS
which is an unnamed signal there.

Signed-off-by: default avatarPeter Rosin <peda@axentia.se>
[claudiu.beznea: add 1 indentation tab before index based comment]
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/32995b53-7f73-936f-a81d-5f1969f64910@axentia.se
parent ac9a7868

arch/arm/boot/dts/at91-tse850-3.dts

+60 −0
Original line number Diff line number Diff line
@@ -300,3 +300,63 @@ 


	dmas = <0>, <0>;	/*  Do not use DMA for dbgu */

};



&pioA {

	gpio-line-names =

	/*  0 */	"SUP-A", "SUP-B", "SUP-C", "SIG<LEV",

	/*  4 */	"", "/RFRST", "", "",

	/*  8 */	"/ADD", "", "/LOOP1", "/LOOP2",

	/* 12 */	"", "", "", "",

	/* 16 */	"LED1GREEN", "LED1RED", "LED2GREEN", "LED2RED",

	/* 20 */	"LED3GREEN", "LED3RED", "LED4GREEN", "LED4RED",

	/* 24 */	"", "", "", "",

	/* 28 */	"", "", "SDA", "SCL";

};



&pioB {

	gpio-line-names =

	/*  0 */	"", "", "", "",

	/*  4 */	"", "", "", "",

	/*  8 */	"", "", "", "",

	/* 12 */	"", "", "", "",

	/* 16 */	"", "", "", "",

	/* 20 */	"", "", "", "",

	/* 24 */	"", "", "SIG<LIN", "SIG>LIN",

	/* 28 */	"RXD", "TXD", "BRX", "BTX";

};



&pioC {

	gpio-line-names =

	/*  0 */	"ETX0", "ETX1", "ERX0", "ERX1",

	/*  4 */	"ETXEN", "ECRSDV", "ERXER", "EREFCK",

	/*  8 */	"EMDC", "EMDIO", "", "",

	/* 12 */	"", "", "", "/ILIM",

	/* 16 */	"BCK", "LRCK", "DIN", "",

	/* 20 */	"", "", "", "",

	/* 24 */	"", "", "", "",

	/* 28 */	"", "", "", "VBUS";

};



&pioD {

	gpio-line-names =

	/*  0 */	"I1", "I2", "O1", "EXTVEN",

	/*  4 */	"", "456KHZ", "VCTRL", "SYNCSEL",

	/*  8 */	"STEREO", "", "", "",

	/* 12 */	"", "", "", "",

	/* 16 */	"", ">LIN", "LIN>", "",

	/* 20 */	"VREFEN", "", "", "",

	/* 24 */	"", "", "VINOK", "",

	/* 28 */	"POEOK", "USBON", "POELOAD", "";

};



&pioE {

	gpio-line-names =

	/*  0 */	"", "", "", "",

	/*  4 */	"", "", "", "",

	/*  8 */	"", "", "", "",

	/* 12 */	"", "", "", "",

	/* 16 */	"", "", "", "",

	/* 20 */	"", "ALE", "CLE", "",

	/* 24 */	"", "", "", "",

	/* 28 */	"", "", "", "/ETHINT";

};