Commit 0875dd59 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branch 'clk-stm32f4' into clk-next 

* clk-stm32f4:
  clk: stm32f7: Add stm32f7 clock DT bindings for STM32F746 boards
parents f080a493 52af8557

Documentation/devicetree/bindings/clock/st,stm32-rcc.txt

+20 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ Required properties: 
- compatible: Should be:

  "st,stm32f42xx-rcc"

  "st,stm32f469-rcc"

  "st,stm32f746-rcc"

- reg: should be register base and length as documented in the

  datasheet

- #reset-cells: 1, see below
@@ -84,6 +85,25 @@ The secondary index is bound with the following magic numbers: 
	12	CLK_I2SQ_PDIV	(post divisor of pll i2s q divisor)

	13	CLK_SAIQ_PDIV	(post divisor of pll sai q divisor)



	14	CLK_HSI		(Internal ocscillator clock)

	15	CLK_SYSCLK	(System Clock)

	16	CLK_HDMI_CEC	(HDMI-CEC clock)

	17	CLK_SPDIF	(SPDIF-Rx clock)

	18	CLK_USART1	(U(s)arts clocks)

	19	CLK_USART2

	20	CLK_USART3

	21	CLK_UART4

	22	CLK_UART5

	23	CLK_USART6

	24	CLK_UART7

	25	CLK_UART8

	26	CLK_I2C1	(I2S clocks)

	27	CLK_I2C2

	28	CLK_I2C3

	29	CLK_I2C4

	30	CLK_LPTIMER	(LPTimer1 clock)

)



Example:



	/* Misc clock, FCLK */

include/dt-bindings/clock/stm32fx-clock.h

+20 −0
Original line number Diff line number Diff line
@@ -36,4 +36,24 @@ 


#define END_PRIMARY_CLK		14



#define CLK_HSI			14

#define CLK_SYSCLK		15

#define CLK_HDMI_CEC		16

#define CLK_SPDIF		17

#define CLK_USART1		18

#define CLK_USART2		19

#define CLK_USART3		20

#define CLK_UART4		21

#define CLK_UART5		22

#define CLK_USART6		23

#define CLK_UART7		24

#define CLK_UART8		25

#define CLK_I2C1		26

#define CLK_I2C2		27

#define CLK_I2C3		28

#define CLK_I2C4		29

#define CLK_LPTIMER		30



#define END_PRIMARY_CLK_F7	31



#endif