Commit 084f51d4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-next-2023-05-05' of git://anongit.freedesktop.org/drm/drm 

Pull more drm fixes from Dave Airlie:
 "This is the fixes for the last couple of weeks for i915 and last 3
  weeks for amdgpu, lots of them but pretty scattered around and all
  pretty small.

  amdgpu:
   - SR-IOV fixes
   - DCN 3.2 fixes
   - DC mclk handling fixes
   - eDP fixes
   - SubVP fixes
   - HDCP regression fix
   - DSC fixes
   - DC FP fixes
   - DCN 3.x fixes
   - Display flickering fix when switching between vram and gtt
   - Z8 power saving fix
   - Fix hang when skipping modeset
   - GPU reset fixes
   - Doorbell fix when resizing BARs
   - Fix spurious warnings in gmc
   - Locking fix for AMDGPU_SCHED IOCTL
   - SR-IOV fix
   - DCN 3.1.4 fix
   - DCN 3.2 fix
   - Fix job cleanup when CS is aborted

  i915:
   - skl pipe source size check
   - mtl transcoder mask fix
   - DSI power on sequence fix
   - GuC versioning corner case fix"

* tag 'drm-next-2023-05-05' of git://anongit.freedesktop.org/drm/drm: (48 commits)
  drm/amdgpu: drop redundant sched job cleanup when cs is aborted
  drm/amd/display: filter out invalid bits in pipe_fuses
  drm/amd/display: Change default Z8 watermark values
  drm/amdgpu: disable SDMA WPTR_POLL_ENABLE for SR-IOV
  drm/amdgpu: add a missing lock for AMDGPU_SCHED
  drm/amdgpu: fix an amdgpu_irq_put() issue in gmc_v9_0_hw_fini()
  drm/amdgpu: fix amdgpu_irq_put call trace in gmc_v10_0_hw_fini
  drm/amdgpu: fix amdgpu_irq_put call trace in gmc_v11_0_hw_fini
  drm/amdgpu: Enable doorbell selfring after resize FB BAR
  drm/amdgpu: Use the default reset when loading or reloading the driver
  drm/amdgpu: Fix mode2 reset for sienna cichlid
  drm/i915/dsi: Use unconditional msleep() instead of intel_dsi_msleep()
  drm/i915/mtl: Add the missing CPU transcoder mask in intel_device_info
  drm/i915/guc: Actually return an error if GuC version range check fails
  drm/amd/display: Lowering min Z8 residency time
  drm/amd/display: fix flickering caused by S/G mode
  drm/amd/display: Set min_width and min_height capability for DCN30
  drm/amd/display: Isolate remaining FPU code in DCN32
  drm/amd/display: Update bounding box values for DCN321
  drm/amd/display: Do not clear GPINT register when releasing DMUB from reset
  ...
parents 78b421b6 1bef84af

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+3 −10
Original line number Diff line number Diff line
@@ -1276,7 +1276,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p, 
		r = drm_sched_job_add_dependency(&leader->base, fence);

		if (r) {

			dma_fence_put(fence);

			goto error_cleanup;

			return r;

		}

	}
@@ -1303,7 +1303,8 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p, 
	}

	if (r) {

		r = -EAGAIN;

		goto error_unlock;

		mutex_unlock(&p->adev->notifier_lock);

		return r;

	}



	p->fence = dma_fence_get(&leader->base.s_fence->finished);
@@ -1350,14 +1351,6 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p, 
	mutex_unlock(&p->adev->notifier_lock);

	mutex_unlock(&p->bo_list->bo_list_mutex);

	return 0;



error_unlock:

	mutex_unlock(&p->adev->notifier_lock);



error_cleanup:

	for (i = 0; i < p->gang_size; ++i)

		drm_sched_job_cleanup(&p->jobs[i]->base);

	return r;

}



/* Cleanup the parser structure */

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+24 −15
Original line number Diff line number Diff line
@@ -2539,8 +2539,6 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev) 
	amdgpu_fru_get_product_info(adev);



init_failed:

	if (amdgpu_sriov_vf(adev))

		amdgpu_virt_release_full_gpu(adev, true);



	return r;

}
@@ -3580,6 +3578,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, 
	int r, i;

	bool px = false;

	u32 max_MBps;

	int tmp;



	adev->shutdown = false;

	adev->flags = flags;
@@ -3801,7 +3800,13 @@ int amdgpu_device_init(struct amdgpu_device *adev, 
				}

			}

		} else {

			tmp = amdgpu_reset_method;

			/* It should do a default reset when loading or reloading the driver,

			 * regardless of the module parameter reset_method.

			 */

			amdgpu_reset_method = AMD_RESET_METHOD_NONE;

			r = amdgpu_asic_reset(adev);

			amdgpu_reset_method = tmp;

			if (r) {

				dev_err(adev->dev, "asic reset on init failed\n");

				goto failed;
@@ -3859,18 +3864,6 @@ int amdgpu_device_init(struct amdgpu_device *adev, 


	r = amdgpu_device_ip_init(adev);

	if (r) {

		/* failed in exclusive mode due to timeout */

		if (amdgpu_sriov_vf(adev) &&

		    !amdgpu_sriov_runtime(adev) &&

		    amdgpu_virt_mmio_blocked(adev) &&

		    !amdgpu_virt_wait_reset(adev)) {

			dev_err(adev->dev, "VF exclusive mode timeout\n");

			/* Don't send request since VF is inactive. */

			adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME;

			adev->virt.ops = NULL;

			r = -EAGAIN;

			goto release_ras_con;

		}

		dev_err(adev->dev, "amdgpu_device_ip_init failed\n");

		amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_AMDGPU_INIT_FAIL, 0, 0);

		goto release_ras_con;
@@ -3939,8 +3932,10 @@ int amdgpu_device_init(struct amdgpu_device *adev, 
				   msecs_to_jiffies(AMDGPU_RESUME_MS));

	}



	if (amdgpu_sriov_vf(adev))

	if (amdgpu_sriov_vf(adev)) {

		amdgpu_virt_release_full_gpu(adev, true);

		flush_delayed_work(&adev->delayed_init_work);

	}



	r = sysfs_create_files(&adev->dev->kobj, amdgpu_dev_attributes);

	if (r)
@@ -3980,6 +3975,20 @@ int amdgpu_device_init(struct amdgpu_device *adev, 
	return 0;



release_ras_con:

	if (amdgpu_sriov_vf(adev))

		amdgpu_virt_release_full_gpu(adev, true);



	/* failed in exclusive mode due to timeout */

	if (amdgpu_sriov_vf(adev) &&

		!amdgpu_sriov_runtime(adev) &&

		amdgpu_virt_mmio_blocked(adev) &&

		!amdgpu_virt_wait_reset(adev)) {

		dev_err(adev->dev, "VF exclusive mode timeout\n");

		/* Don't send request since VF is inactive. */

		adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME;

		adev->virt.ops = NULL;

		r = -EAGAIN;

	}

	amdgpu_release_ras_context(adev);



failed:

drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c

+5 −1
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ static int amdgpu_sched_process_priority_override(struct amdgpu_device *adev, 
{

	struct fd f = fdget(fd);

	struct amdgpu_fpriv *fpriv;

	struct amdgpu_ctx_mgr *mgr;

	struct amdgpu_ctx *ctx;

	uint32_t id;

	int r;
@@ -51,8 +52,11 @@ static int amdgpu_sched_process_priority_override(struct amdgpu_device *adev, 
		return r;

	}



	idr_for_each_entry(&fpriv->ctx_mgr.ctx_handles, ctx, id)

	mgr = &fpriv->ctx_mgr;

	mutex_lock(&mgr->lock);

	idr_for_each_entry(&mgr->ctx_handles, ctx, id)

		amdgpu_ctx_priority_override(ctx, priority);

	mutex_unlock(&mgr->lock);



	fdput(f);

	return 0;

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

+0 −1
Original line number Diff line number Diff line
@@ -1143,7 +1143,6 @@ static int gmc_v10_0_hw_fini(void *handle) 
		return 0;

	}



	amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);

	amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);



	return 0;

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

+0 −1
Original line number Diff line number Diff line
@@ -951,7 +951,6 @@ static int gmc_v11_0_hw_fini(void *handle) 
		return 0;

	}



	amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);

	amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);

	gmc_v11_0_gart_disable(adev);