Commit 082ff36b authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by David S. Miller
Browse files

arm64: dts: mediatek: mt7986: introduce ethernet nodes 



Introduce ethernet nodes in mt7986 bindings in order to
enable mt7986a/mt7986b ethernet support.

Co-developed-by: default avatarSam Shih <sam.shih@mediatek.com>
Signed-off-by: default avatarSam Shih <sam.shih@mediatek.com>
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent cf0005d2

arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts

+74 −0
Original line number Diff line number Diff line
@@ -25,6 +25,80 @@ 
	};

};



&eth {

	status = "okay";



	gmac0: mac@0 {

		compatible = "mediatek,eth-mac";

		reg = <0>;

		phy-mode = "2500base-x";



		fixed-link {

			speed = <2500>;

			full-duplex;

			pause;

		};

	};



	mdio: mdio-bus {

		#address-cells = <1>;

		#size-cells = <0>;

	};

};



&mdio {

	switch: switch@0 {

		compatible = "mediatek,mt7531";

		reg = <31>;

		reset-gpios = <&pio 5 0>;

	};

};



&switch {

	ports {

		#address-cells = <1>;

		#size-cells = <0>;



		port@0 {

			reg = <0>;

			label = "lan0";

		};



		port@1 {

			reg = <1>;

			label = "lan1";

		};



		port@2 {

			reg = <2>;

			label = "lan2";

		};



		port@3 {

			reg = <3>;

			label = "lan3";

		};



		port@4 {

			reg = <4>;

			label = "lan4";

		};



		port@6 {

			reg = <6>;

			label = "cpu";

			ethernet = <&gmac0>;

			phy-mode = "2500base-x";



			fixed-link {

				speed = <2500>;

				full-duplex;

				pause;

			};

		};

	};

};



&uart0 {

	status = "okay";

};

arch/arm64/boot/dts/mediatek/mt7986a.dtsi

+39 −0
Original line number Diff line number Diff line
@@ -222,6 +222,45 @@ 
			 #reset-cells = <1>;

		};



		eth: ethernet@15100000 {

			compatible = "mediatek,mt7986-eth";

			reg = <0 0x15100000 0 0x80000>;

			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ethsys CLK_ETH_FE_EN>,

				 <&ethsys CLK_ETH_GP2_EN>,

				 <&ethsys CLK_ETH_GP1_EN>,

				 <&ethsys CLK_ETH_WOCPU1_EN>,

				 <&ethsys CLK_ETH_WOCPU0_EN>,

				 <&sgmiisys0 CLK_SGMII0_TX250M_EN>,

				 <&sgmiisys0 CLK_SGMII0_RX250M_EN>,

				 <&sgmiisys0 CLK_SGMII0_CDR_REF>,

				 <&sgmiisys0 CLK_SGMII0_CDR_FB>,

				 <&sgmiisys1 CLK_SGMII1_TX250M_EN>,

				 <&sgmiisys1 CLK_SGMII1_RX250M_EN>,

				 <&sgmiisys1 CLK_SGMII1_CDR_REF>,

				 <&sgmiisys1 CLK_SGMII1_CDR_FB>,

				 <&topckgen CLK_TOP_NETSYS_SEL>,

				 <&topckgen CLK_TOP_NETSYS_500M_SEL>;

			clock-names = "fe", "gp2", "gp1", "wocpu1", "wocpu0",

				      "sgmii_tx250m", "sgmii_rx250m",

				      "sgmii_cdr_ref", "sgmii_cdr_fb",

				      "sgmii2_tx250m", "sgmii2_rx250m",

				      "sgmii2_cdr_ref", "sgmii2_cdr_fb",

				      "netsys0", "netsys1";

			assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>,

					  <&topckgen CLK_TOP_SGM_325M_SEL>;

			assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>,

						 <&apmixedsys CLK_APMIXED_SGMPLL>;

			mediatek,ethsys = <&ethsys>;

			mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;

			#reset-cells = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};

	};



};

arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts

+70 −0
Original line number Diff line number Diff line
@@ -28,3 +28,73 @@ 
&uart0 {

	status = "okay";

};



&eth {

	status = "okay";



	gmac0: mac@0 {

		compatible = "mediatek,eth-mac";

		reg = <0>;

		phy-mode = "2500base-x";



		fixed-link {

			speed = <2500>;

			full-duplex;

			pause;

		};

	};



	mdio: mdio-bus {

		#address-cells = <1>;

		#size-cells = <0>;



		switch@0 {

			compatible = "mediatek,mt7531";

			reg = <31>;

			reset-gpios = <&pio 5 0>;



			ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					label = "lan0";

				};



				port@1 {

					reg = <1>;

					label = "lan1";

				};



				port@2 {

					reg = <2>;

					label = "lan2";

				};



				port@3 {

					reg = <3>;

					label = "lan3";

				};



				port@4 {

					reg = <4>;

					label = "lan4";

				};



				port@6 {

					reg = <6>;

					label = "cpu";

					ethernet = <&gmac0>;

					phy-mode = "2500base-x";



					fixed-link {

						speed = <2500>;

						full-duplex;

						pause;

					};

				};

			};

		};

	};

};