Loading arch/arc/include/asm/unaligned.h +2 −1 Original line number Diff line number Diff line Loading @@ -22,7 +22,8 @@ static inline int misaligned_fixup(unsigned long address, struct pt_regs *regs, struct callee_regs *cregs) { return 0; /* Not fixed */ return 1; } #endif Loading arch/arc/kernel/entry.S +0 −4 Original line number Diff line number Diff line Loading @@ -366,7 +366,6 @@ ARC_ENTRY EV_TLBProtV ;========== (6b) Non aligned access ============ 4: #ifdef CONFIG_ARC_MISALIGN_ACCESS SAVE_CALLEE_SAVED_USER mov r2, sp ; callee_regs Loading @@ -375,9 +374,6 @@ ARC_ENTRY EV_TLBProtV ; TBD: optimize - do this only if a callee reg was involved ; either a dst of emulated LD/ST or src with address-writeback RESTORE_CALLEE_SAVED_USER #else bl do_misaligned_error #endif b ret_from_exception Loading arch/arc/kernel/traps.c +1 −2 Original line number Diff line number Diff line Loading @@ -84,19 +84,18 @@ DO_ERROR_INFO(SIGBUS, "Invalid Mem Access", do_memory_error, BUS_ADRERR) DO_ERROR_INFO(SIGTRAP, "Breakpoint Set", trap_is_brkpt, TRAP_BRKPT) DO_ERROR_INFO(SIGBUS, "Misaligned Access", do_misaligned_error, BUS_ADRALN) #ifdef CONFIG_ARC_MISALIGN_ACCESS /* * Entry Point for Misaligned Data access Exception, for emulating in software */ int do_misaligned_access(unsigned long address, struct pt_regs *regs, struct callee_regs *cregs) { /* If emulation not enabled, or failed, kill the task */ if (misaligned_fixup(address, regs, cregs) != 0) return do_misaligned_error(address, regs); return 0; } #endif /* * Entry point for miscll errors such as Nested Exceptions Loading Loading
arch/arc/include/asm/unaligned.h +2 −1 Original line number Diff line number Diff line Loading @@ -22,7 +22,8 @@ static inline int misaligned_fixup(unsigned long address, struct pt_regs *regs, struct callee_regs *cregs) { return 0; /* Not fixed */ return 1; } #endif Loading
arch/arc/kernel/entry.S +0 −4 Original line number Diff line number Diff line Loading @@ -366,7 +366,6 @@ ARC_ENTRY EV_TLBProtV ;========== (6b) Non aligned access ============ 4: #ifdef CONFIG_ARC_MISALIGN_ACCESS SAVE_CALLEE_SAVED_USER mov r2, sp ; callee_regs Loading @@ -375,9 +374,6 @@ ARC_ENTRY EV_TLBProtV ; TBD: optimize - do this only if a callee reg was involved ; either a dst of emulated LD/ST or src with address-writeback RESTORE_CALLEE_SAVED_USER #else bl do_misaligned_error #endif b ret_from_exception Loading
arch/arc/kernel/traps.c +1 −2 Original line number Diff line number Diff line Loading @@ -84,19 +84,18 @@ DO_ERROR_INFO(SIGBUS, "Invalid Mem Access", do_memory_error, BUS_ADRERR) DO_ERROR_INFO(SIGTRAP, "Breakpoint Set", trap_is_brkpt, TRAP_BRKPT) DO_ERROR_INFO(SIGBUS, "Misaligned Access", do_misaligned_error, BUS_ADRALN) #ifdef CONFIG_ARC_MISALIGN_ACCESS /* * Entry Point for Misaligned Data access Exception, for emulating in software */ int do_misaligned_access(unsigned long address, struct pt_regs *regs, struct callee_regs *cregs) { /* If emulation not enabled, or failed, kill the task */ if (misaligned_fixup(address, regs, cregs) != 0) return do_misaligned_error(address, regs); return 0; } #endif /* * Entry point for miscll errors such as Nested Exceptions Loading