Loading Documentation/devicetree/bindings/arm/tegra.txt 0 → 100644 +14 −0 Original line number Diff line number Diff line NVIDIA Tegra device tree bindings ------------------------------------------- Boards with the tegra20 SoC shall have the following properties: Required root node property: compatible = "nvidia,tegra20"; Boards with the tegra30 SoC shall have the following properties: Required root node property: compatible = "nvidia,tegra30"; Documentation/devicetree/bindings/usb/tegra-usb.txt 0 → 100644 +13 −0 Original line number Diff line number Diff line Tegra SOC USB controllers The device node for a USB controller that is part of a Tegra SOC is as described in the document "Open Firmware Recommended Practice : Universal Serial Bus" with the following modifications and additions : Required properties : - compatible : Should be "nvidia,tegra20-ehci" for USB controllers used in host mode. - phy_type : Should be one of "ulpi" or "utmi". - nvidia,vbus-gpio : If present, specifies a gpio that needs to be activated for the bus to be powered. arch/arm/Kconfig +2 −2 Original line number Diff line number Diff line Loading @@ -1971,7 +1971,7 @@ endchoice config XIP_KERNEL bool "Kernel Execute-In-Place from ROM" depends on !ZBOOT_ROM depends on !ZBOOT_ROM && !ARM_LPAE help Execute-In-Place allows the kernel to run from non-volatile storage directly addressable by the CPU, such as NOR flash. This saves RAM Loading Loading @@ -2001,7 +2001,7 @@ config XIP_PHYS_ADDR config KEXEC bool "Kexec system call (EXPERIMENTAL)" depends on EXPERIMENTAL depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU) help kexec is a system call that implements the ability to shutdown your current kernel, and to start another kernel. It is like a reboot Loading arch/arm/boot/compressed/head.S +1 −0 Original line number Diff line number Diff line Loading @@ -659,6 +659,7 @@ __armv7_mmu_cache_on: mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer mcrne p15, 0, r1, c3, c0, 0 @ load domain access control #endif mcr p15, 0, r0, c7, c5, 4 @ ISB mcr p15, 0, r0, c1, c0, 0 @ load control register mrc p15, 0, r0, c1, c0, 0 @ and read it back mov r0, #0 Loading arch/arm/boot/dts/tegra-harmony.dts +24 −5 Original line number Diff line number Diff line /dts-v1/; /memreserve/ 0x1c000000 0x04000000; /include/ "tegra20.dtsi" / { model = "NVIDIA Tegra2 Harmony evaluation board"; compatible = "nvidia,harmony", "nvidia,tegra20"; chosen { bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk0p2 rw rootwait"; }; memory@0 { reg = < 0x00000000 0x40000000 >; }; Loading Loading @@ -52,16 +47,40 @@ ext-mic-en-gpios = <&gpio 185 0>; }; serial@70006000 { status = "disable"; }; serial@70006040 { status = "disable"; }; serial@70006200 { status = "disable"; }; serial@70006300 { clock-frequency = < 216000000 >; }; serial@70006400 { status = "disable"; }; sdhci@c8000000 { status = "disable"; }; sdhci@c8000200 { cd-gpios = <&gpio 69 0>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 155 0>; /* gpio PT3 */ }; sdhci@c8000400 { status = "disable"; }; sdhci@c8000600 { cd-gpios = <&gpio 58 0>; /* gpio PH2 */ wp-gpios = <&gpio 59 0>; /* gpio PH3 */ Loading Loading
Documentation/devicetree/bindings/arm/tegra.txt 0 → 100644 +14 −0 Original line number Diff line number Diff line NVIDIA Tegra device tree bindings ------------------------------------------- Boards with the tegra20 SoC shall have the following properties: Required root node property: compatible = "nvidia,tegra20"; Boards with the tegra30 SoC shall have the following properties: Required root node property: compatible = "nvidia,tegra30";
Documentation/devicetree/bindings/usb/tegra-usb.txt 0 → 100644 +13 −0 Original line number Diff line number Diff line Tegra SOC USB controllers The device node for a USB controller that is part of a Tegra SOC is as described in the document "Open Firmware Recommended Practice : Universal Serial Bus" with the following modifications and additions : Required properties : - compatible : Should be "nvidia,tegra20-ehci" for USB controllers used in host mode. - phy_type : Should be one of "ulpi" or "utmi". - nvidia,vbus-gpio : If present, specifies a gpio that needs to be activated for the bus to be powered.
arch/arm/Kconfig +2 −2 Original line number Diff line number Diff line Loading @@ -1971,7 +1971,7 @@ endchoice config XIP_KERNEL bool "Kernel Execute-In-Place from ROM" depends on !ZBOOT_ROM depends on !ZBOOT_ROM && !ARM_LPAE help Execute-In-Place allows the kernel to run from non-volatile storage directly addressable by the CPU, such as NOR flash. This saves RAM Loading Loading @@ -2001,7 +2001,7 @@ config XIP_PHYS_ADDR config KEXEC bool "Kexec system call (EXPERIMENTAL)" depends on EXPERIMENTAL depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU) help kexec is a system call that implements the ability to shutdown your current kernel, and to start another kernel. It is like a reboot Loading
arch/arm/boot/compressed/head.S +1 −0 Original line number Diff line number Diff line Loading @@ -659,6 +659,7 @@ __armv7_mmu_cache_on: mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer mcrne p15, 0, r1, c3, c0, 0 @ load domain access control #endif mcr p15, 0, r0, c7, c5, 4 @ ISB mcr p15, 0, r0, c1, c0, 0 @ load control register mrc p15, 0, r0, c1, c0, 0 @ and read it back mov r0, #0 Loading
arch/arm/boot/dts/tegra-harmony.dts +24 −5 Original line number Diff line number Diff line /dts-v1/; /memreserve/ 0x1c000000 0x04000000; /include/ "tegra20.dtsi" / { model = "NVIDIA Tegra2 Harmony evaluation board"; compatible = "nvidia,harmony", "nvidia,tegra20"; chosen { bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk0p2 rw rootwait"; }; memory@0 { reg = < 0x00000000 0x40000000 >; }; Loading Loading @@ -52,16 +47,40 @@ ext-mic-en-gpios = <&gpio 185 0>; }; serial@70006000 { status = "disable"; }; serial@70006040 { status = "disable"; }; serial@70006200 { status = "disable"; }; serial@70006300 { clock-frequency = < 216000000 >; }; serial@70006400 { status = "disable"; }; sdhci@c8000000 { status = "disable"; }; sdhci@c8000200 { cd-gpios = <&gpio 69 0>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 155 0>; /* gpio PT3 */ }; sdhci@c8000400 { status = "disable"; }; sdhci@c8000600 { cd-gpios = <&gpio 58 0>; /* gpio PH2 */ wp-gpios = <&gpio 59 0>; /* gpio PH3 */ Loading