Unverified Commit 0760d5d0 authored by Abe Kohandel's avatar Abe Kohandel Committed by Mark Brown
Browse files

spi: dw: Add compatible for Intel Mount Evans SoC 



The Intel Mount Evans SoC's Integrated Management Complex uses the SPI
controller for access to a NOR SPI FLASH. However, the SoC doesn't
provide a mechanism to override the native chip select signal.

This driver doesn't use DMA for memory operations when a chip select
override is not provided due to the native chip select timing behavior.
As a result no DMA configuration is done for the controller and this
configuration is not tested.

The controller also has an errata where a full TX FIFO can result in
data corruption. The suggested workaround is to never completely fill
the FIFO. The TX FIFO has a size of 32 so the fifo_len is set to 31.

Signed-off-by: default avatarAbe Kohandel <abe.kohandel@intel.com>
Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230606145402.474866-2-abe.kohandel@intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 8098a931

drivers/spi/spi-dw-mmio.c

+29 −0
Original line number Diff line number Diff line
@@ -236,6 +236,31 @@ static int dw_spi_intel_init(struct platform_device *pdev, 
	return 0;

}



/*

 * The Intel Mount Evans SoC's Integrated Management Complex uses the

 * SPI controller for access to a NOR SPI FLASH. However, the SoC doesn't

 * provide a mechanism to override the native chip select signal.

 *

 * This driver doesn't use DMA for memory operations when a chip select

 * override is not provided due to the native chip select timing behavior.

 * As a result no DMA configuration is done for the controller and this

 * configuration is not tested.

 */

static int dw_spi_mountevans_imc_init(struct platform_device *pdev,

				      struct dw_spi_mmio *dwsmmio)

{

	/*

	 * The Intel Mount Evans SoC's Integrated Management Complex DW

	 * apb_ssi_v4.02a controller has an errata where a full TX FIFO can

	 * result in data corruption. The suggested workaround is to never

	 * completely fill the FIFO. The TX FIFO has a size of 32 so the

	 * fifo_len is set to 31.

	 */

	dwsmmio->dws.fifo_len = 31;



	return 0;

}



static int dw_spi_canaan_k210_init(struct platform_device *pdev,

				   struct dw_spi_mmio *dwsmmio)

{
@@ -405,6 +430,10 @@ static const struct of_device_id dw_spi_mmio_of_match[] = { 
	{ .compatible = "snps,dwc-ssi-1.01a", .data = dw_spi_hssi_init},

	{ .compatible = "intel,keembay-ssi", .data = dw_spi_intel_init},

	{ .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init},

	{

		.compatible = "intel,mountevans-imc-ssi",

		.data = dw_spi_mountevans_imc_init,

	},

	{ .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},

	{ .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init},

	{ .compatible = "amd,pensando-elba-spi", .data = dw_spi_elba_init},