Commit 0757ca01 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'iommu-fixes-v5.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu 

Pull iommu fixes from Joerg Roedel:

 - Intel VT-d fixes:
     - Remove unused PASID_DISABLED
     - Fix RCU locking
     - Fix for the unmap_pages call-back

 - Rockchip RK3568 address mask fix

 - AMD IOMMUv2 log message clarification

* tag 'iommu-fixes-v5.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
  iommu/vt-d: Fix unmap_pages support
  iommu/vt-d: Fix an unbalanced rcu_read_lock/rcu_read_unlock()
  iommu/rockchip: Fix PAGE_DESC_HI_MASKs for RK3568
  iommu/amd: Clarify AMD IOMMUv2 initialization messages
  iommu/vt-d: Remove unused PASID_DISABLED
parents 3498e7f2 86dc40c7

arch/x86/include/asm/fpu/api.h

+0 −6
Original line number Diff line number Diff line
@@ -102,12 +102,6 @@ extern void switch_fpu_return(void); 
 */

extern int cpu_has_xfeatures(u64 xfeatures_mask, const char **feature_name);



/*

 * Tasks that are not using SVA have mm->pasid set to zero to note that they

 * will not have the valid bit set in MSR_IA32_PASID while they are running.

 */

#define PASID_DISABLED	0



/* Trap handling */

extern int  fpu__exception_code(struct fpu *fpu, int trap_nr);

extern void fpu_sync_fpstate(struct fpu *fpu);

drivers/iommu/amd/iommu_v2.c

+3 −3
Original line number Diff line number Diff line
@@ -929,10 +929,8 @@ static int __init amd_iommu_v2_init(void) 
{

	int ret;



	pr_info("AMD IOMMUv2 driver by Joerg Roedel <jroedel@suse.de>\n");



	if (!amd_iommu_v2_supported()) {

		pr_info("AMD IOMMUv2 functionality not available on this system\n");

		pr_info("AMD IOMMUv2 functionality not available on this system - This is not a bug.\n");

		/*

		 * Load anyway to provide the symbols to other modules

		 * which may use AMD IOMMUv2 optionally.
@@ -947,6 +945,8 @@ static int __init amd_iommu_v2_init(void) 


	amd_iommu_register_ppr_notifier(&ppr_nb);



	pr_info("AMD IOMMUv2 loaded and initialized\n");



	return 0;



out:

drivers/iommu/intel/cap_audit.c

+3 −2
Original line number Diff line number Diff line
@@ -144,6 +144,7 @@ static int cap_audit_static(struct intel_iommu *iommu, enum cap_audit_type type) 
{

	struct dmar_drhd_unit *d;

	struct intel_iommu *i;

	int rc = 0;



	rcu_read_lock();

	if (list_empty(&dmar_drhd_units))
@@ -169,11 +170,11 @@ static int cap_audit_static(struct intel_iommu *iommu, enum cap_audit_type type) 
	 */

	if (intel_cap_smts_sanity() &&

	    !intel_cap_flts_sanity() && !intel_cap_slts_sanity())

		return -EOPNOTSUPP;

		rc = -EOPNOTSUPP;



out:

	rcu_read_unlock();

	return 0;

	return rc;

}



int intel_cap_audit(enum cap_audit_type type, struct intel_iommu *iommu)

drivers/iommu/intel/iommu.c

+2 −4
Original line number Diff line number Diff line
@@ -1339,13 +1339,11 @@ static struct page *dma_pte_clear_level(struct dmar_domain *domain, int level, 
	pte = &pte[pfn_level_offset(pfn, level)];



	do {

		unsigned long level_pfn;

		unsigned long level_pfn = pfn & level_mask(level);



		if (!dma_pte_present(pte))

			goto next;



		level_pfn = pfn & level_mask(level);



		/* If range covers entire pagetable, free it */

		if (start_pfn <= level_pfn &&

		    last_pfn >= level_pfn + level_size(level) - 1) {
@@ -1366,7 +1364,7 @@ static struct page *dma_pte_clear_level(struct dmar_domain *domain, int level, 
						       freelist);

		}

next:

		pfn += level_size(level);

		pfn = level_pfn + level_size(level);

	} while (!first_pte_in_page(++pte) && pfn <= last_pfn);



	if (first_pte)

drivers/iommu/rockchip-iommu.c

+2 −2
Original line number Diff line number Diff line
@@ -200,8 +200,8 @@ static inline phys_addr_t rk_dte_pt_address(u32 dte) 
#define DTE_HI_MASK2	GENMASK(7, 4)

#define DTE_HI_SHIFT1	24 /* shift bit 8 to bit 32 */

#define DTE_HI_SHIFT2	32 /* shift bit 4 to bit 36 */

#define PAGE_DESC_HI_MASK1	GENMASK_ULL(39, 36)

#define PAGE_DESC_HI_MASK2	GENMASK_ULL(35, 32)

#define PAGE_DESC_HI_MASK1	GENMASK_ULL(35, 32)

#define PAGE_DESC_HI_MASK2	GENMASK_ULL(39, 36)



static inline phys_addr_t rk_dte_pt_address_v2(u32 dte)

{