Commit 070a7252 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mtd/for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux 

Pull mtd updates from Miquel Raynal:
 "MTD core:
   - Handle possible -EPROBE_DEFER from parse_mtd_partitions()
   - Constify buf in mtd_write_user_prot_reg()
   - Constify name param in mtd_bdi_init
   - Fix fall-through warnings for Clang
   - Get rid of Big MTD Lock ouf of mtdchar
   - Drop mtd_mutex usage from mtdchar_open()
   - Don't lock when recursively deleting partitions
   - Use module_mtd_blktrans() to register driver when relevant
   - Parse MTD as NVMEM cells
   - New OTP (one-time-programmable) erase ioctl
   - Require write permissions for locking and badblock ioctls
   - physmap:
      - Fix error return code of physmap_flash_remove()
      - physmap-bt1-rom: Fix unintentional stack access
   - ofpart parser:
      - Support Linksys Northstar partitions
      - Make symbol 'bcm4908_partitions_quirks' static
      - Limit parsing of deprecated DT syntax
      - Support BCM4908 fixed partitions
   - Qcom parser:
      - Incompatible with spi-nor 4k sectors
      - Fix error condition
      - Extend Qcom SMEM parser to SPI flash

  CFI:
   - Disable broken buffered writes for CFI chips within ID 0x2201
   - Address a Coverity report for unused value

  SPI NOR core:
   - Add OTP support
   - Fix module unload while an op in progress
   - Add various cleanup patches
   - Add Michael and Pratyush as designated reviewers in MAINTAINERS

  SPI NOR controller drivers:
   - intel-spi:
      - Move platform data header to x86 subfolder

  NAND core:
   - Fix error handling in nand_prog_page_op() (x2)
   - Add a helper to retrieve the number of ECC bytes per step
   - Add a helper to retrieve the number of ECC steps
   - Let ECC engines advertize the exact number of steps
   - ECC Hamming:
      - Populate the public nsteps field
      - Use the public nsteps field
   - ECC BCH:
      - Populate the public nsteps field
      - Use the public nsteps field

  Raw NAND core:
   - Add support for secure regions in NAND memory
   - Try not to use the ECC private structures
   - Remove duplicate include in rawnand.h
   - BBT:
      - Skip bad blocks when searching for the BBT in NAND (APPLIED THEN REVERTED)

  Raw NAND controller drivers:
   - Qcom:
      - Convert bindings to YAML
      - Use dma_mapping_error() for error check
      - Add missing nand_cleanup() in error path
      - Return actual error code instead of -ENODEV
      - Update last code word register
      - Add helper to configure location register
      - Rename parameter name in macro
      - Add helper to check last code word
      - Convert nandc to chip in Read/Write helper
      - Update register macro name for 0x2c offset
   - GPMI:
      - Fix a double free in gpmi_nand_init
   - Rockchip:
      - Use flexible-array member instead of zero-length array
   - Atmel:
      - Update ecc_stats.corrected counter
   - MXC:
      - Remove unneeded of_match_ptr()
   - R852:
      - replace spin_lock_irqsave by spin_lock in hard IRQ
   - Brcmnand:
      - Move to polling in pio mode on oops write
      - Read/write oob during EDU transfer
      - Fix OOB R/W with Hamming ECC
   - FSMC:
      - Fix error code in fsmc_nand_probe()
   - OMAP:
      - Use ECC information from the generic structures

  SPI-NAND core:
   - Add missing MODULE_DEVICE_TABLE()

  SPI-NAND drivers:
   - gigadevice: Support GD5F1GQ5UExxG"

* tag 'mtd/for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (89 commits)
  Revert "mtd: rawnand: bbt: Skip bad blocks when searching for the BBT in NAND"
  mtd: core: Constify buf in mtd_write_user_prot_reg()
  Revert "mtd: spi-nor: macronix: Add support for mx25l51245g"
  mtd: spi-nor: core: Fix an issue of releasing resources during read/write
  mtd: cfi_cmdset_0002: remove redundant assignment to variable timeo
  mtd: cfi_cmdset_0002: Disable buffered writes for AMD chip 0x2201
  mtd: rawnand: qcom: Use dma_mapping_error() for error check
  mtd: rawnand: gpmi: Fix a double free in gpmi_nand_init
  mtd: rawnand: qcom: Add missing nand_cleanup() in error path
  mtd: rawnand: Add support for secure regions in NAND memory
  dt-bindings: mtd: Add a property to declare secure regions in NAND chips
  dt-bindings: mtd: Convert Qcom NANDc binding to YAML
  mtd: spi-nor: winbond: add OTP support to w25q32fw/jw
  mtd: spi-nor: implement OTP support for Winbond and similar flashes
  mtd: spi-nor: add OTP support
  mtd: spi-nor: swp: Improve code around spi_nor_check_lock_status_sr()
  mtd: spi-nor: Move Software Write Protection logic out of the core
  mtd: rawnand: bbt: Skip bad blocks when searching for the BBT in NAND
  include: linux: mtd: Remove duplicate include of nand.h
  mtd: parsers: ofpart: support Linksys Northstar partitions
  ...
parents e19eede5 a881537d

Documentation/devicetree/bindings/mtd/nand-controller.yaml

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@@ -143,6 +143,13 @@ patternProperties: 
          Ready/Busy pins. Active state refers to the NAND ready state and

          should be set to GPIOD_ACTIVE_HIGH unless the signal is inverted.



      secure-regions:

        $ref: /schemas/types.yaml#/definitions/uint64-matrix

        description:

          Regions in the NAND chip which are protected using a secure element

          like Trustzone. This property contains the start address and size of

          the secure regions present.



    required:

      - reg

Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/mtd/partitions/linksys,ns-partitions.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Linksys Northstar partitioning



description: |

  Linksys devices based on Broadcom Northstar architecture often use two

  firmware partitions. One is used for regular booting, the other is treated as

  fallback.



  This binding allows defining all fixed partitions and marking those containing

  firmware. System can use that information e.g. for booting or flashing

  purposes.



maintainers:

  - Rafał Miłecki <rafal@milecki.pl>



properties:

  compatible:

    const: linksys,ns-partitions



  "#address-cells":

    enum: [ 1, 2 ]



  "#size-cells":

    enum: [ 1, 2 ]



patternProperties:

  "^partition@[0-9a-f]+$":

    $ref: "partition.yaml#"

    properties:

      compatible:

        items:

          - const: linksys,ns-firmware

          - const: brcm,trx

    unevaluatedProperties: false



required:

  - "#address-cells"

  - "#size-cells"



additionalProperties: false



examples:

  - |

    partitions {

        compatible = "linksys,ns-partitions";

        #address-cells = <1>;

        #size-cells = <1>;



        partition@0 {

            label = "boot";

            reg = <0x0 0x100000>;

            read-only;

        };



        partition@100000 {

            label = "nvram";

            reg = <0x100000 0x100000>;

        };



        partition@200000 {

            compatible = "linksys,ns-firmware", "brcm,trx";

            reg = <0x200000 0xf00000>;

        };



        partition@1100000 {

            compatible = "linksys,ns-firmware", "brcm,trx";

            reg = <0x1100000 0xf00000>;

        };

    };

Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/mtd/partitions/nvmem-cells.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Nvmem cells



description: |

  Any partition containing the compatible "nvmem-cells" will register as a

  nvmem provider.

  Each direct subnodes represents a nvmem cell following the nvmem binding.

  Nvmem binding to declare nvmem-cells can be found in:

  Documentation/devicetree/bindings/nvmem/nvmem.yaml



maintainers:

  - Ansuel Smith <ansuelsmth@gmail.com>



allOf:

  - $ref: /schemas/nvmem/nvmem.yaml#



properties:

  compatible:

    const: nvmem-cells



required:

  - compatible



additionalProperties: true



examples:

  - |

    partitions {

      compatible = "fixed-partitions";

      #address-cells = <1>;

      #size-cells = <1>;



      /* ... */



      };

      art: art@1200000 {

        compatible = "nvmem-cells";

        reg = <0x1200000 0x0140000>;

        label = "art";

        read-only;

        #address-cells = <1>;

        #size-cells = <1>;



        macaddr_gmac1: macaddr_gmac1@0 {

          reg = <0x0 0x6>;

        };



        macaddr_gmac2: macaddr_gmac2@6 {

          reg = <0x6 0x6>;

        };



        pre_cal_24g: pre_cal_24g@1000 {

          reg = <0x1000 0x2f20>;

        };



        pre_cal_5g: pre_cal_5g@5000{

          reg = <0x5000 0x2f20>;

        };

      };

  - |

    partitions {

        compatible = "fixed-partitions";

        #address-cells = <1>;

        #size-cells = <1>;



        partition@0 {

            label = "bootloader";

            reg = <0x000000 0x100000>;

            read-only;

        };



        firmware@100000 {

            compatible = "brcm,trx";

            label = "firmware";

            reg = <0x100000 0xe00000>;

        };



        calibration@f00000 {

            compatible = "nvmem-cells";

            label = "calibration";

            reg = <0xf00000 0x100000>;

            ranges = <0 0xf00000 0x100000>;

            #address-cells = <1>;

            #size-cells = <1>;



            wifi0@0 {

                reg = <0x000000 0x080000>;

            };



            wifi1@80000 {

                reg = <0x080000 0x080000>;

            };

        };

    };

Documentation/devicetree/bindings/mtd/qcom,nandc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/mtd/qcom,nandc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm NAND controller



maintainers:

  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>



properties:

  compatible:

    enum:

      - qcom,ipq806x-nand

      - qcom,ipq4019-nand

      - qcom,ipq6018-nand

      - qcom,ipq8074-nand

      - qcom,sdx55-nand



  reg:

    maxItems: 1



  clocks:

    items:

      - description: Core Clock

      - description: Always ON Clock



  clock-names:

    items:

      - const: core

      - const: aon



  "#address-cells": true

  "#size-cells": true



patternProperties:

  "^nand@[a-f0-9]$":

    type: object

    properties:

      nand-bus-width:

        const: 8



      nand-ecc-strength:

        enum: [1, 4, 8]



      nand-ecc-step-size:

        enum:

          - 512



allOf:

  - $ref: "nand-controller.yaml#"



  - if:

      properties:

        compatible:

          contains:

            const: qcom,ipq806x-nand

    then:

      properties:

        dmas:

          items:

            - description: rxtx DMA channel



        dma-names:

          items:

            - const: rxtx



        qcom,cmd-crci:

          $ref: /schemas/types.yaml#/definitions/uint32

          description:

            Must contain the ADM command type CRCI block instance number

            specified for the NAND controller on the given platform



        qcom,data-crci:

          $ref: /schemas/types.yaml#/definitions/uint32

          description:

            Must contain the ADM data type CRCI block instance number

            specified for the NAND controller on the given platform



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,ipq4019-nand

              - qcom,ipq6018-nand

              - qcom,ipq8074-nand

              - qcom,sdx55-nand



    then:

      properties:

        dmas:

          items:

            - description: tx DMA channel

            - description: rx DMA channel

            - description: cmd DMA channel



        dma-names:

          items:

            - const: tx

            - const: rx

            - const: cmd



required:

  - compatible

  - reg

  - clocks

  - clock-names



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/qcom,gcc-ipq806x.h>

    nand-controller@1ac00000 {

      compatible = "qcom,ipq806x-nand";

      reg = <0x1ac00000 0x800>;



      clocks = <&gcc EBI2_CLK>,

               <&gcc EBI2_AON_CLK>;

      clock-names = "core", "aon";



      dmas = <&adm_dma 3>;

      dma-names = "rxtx";

      qcom,cmd-crci = <15>;

      qcom,data-crci = <3>;



      #address-cells = <1>;

      #size-cells = <0>;



      nand@0 {

        reg = <0>;



        nand-ecc-strength = <4>;

        nand-bus-width = <8>;



        partitions {

          compatible = "fixed-partitions";

          #address-cells = <1>;

          #size-cells = <1>;



          partition@0 {

            label = "boot-nand";

            reg = <0 0x58a0000>;

          };



          partition@58a0000 {

            label = "fs-nand";

            reg = <0x58a0000 0x4000000>;

          };

        };

      };

    };



    #include <dt-bindings/clock/qcom,gcc-ipq4019.h>

    nand-controller@79b0000 {

      compatible = "qcom,ipq4019-nand";

      reg = <0x79b0000 0x1000>;



      clocks = <&gcc GCC_QPIC_CLK>,

               <&gcc GCC_QPIC_AHB_CLK>;

      clock-names = "core", "aon";



      dmas = <&qpicbam 0>,

             <&qpicbam 1>,

             <&qpicbam 2>;

      dma-names = "tx", "rx", "cmd";



      #address-cells = <1>;

      #size-cells = <0>;



      nand@0 {

        reg = <0>;

        nand-ecc-strength = <4>;

        nand-bus-width = <8>;



        partitions {

          compatible = "fixed-partitions";

          #address-cells = <1>;

          #size-cells = <1>;



          partition@0 {

            label = "boot-nand";

            reg = <0 0x58a0000>;

          };



          partition@58a0000 {

            label = "fs-nand";

            reg = <0x58a0000 0x4000000>;

          };

        };

      };

    };



...

Documentation/devicetree/bindings/mtd/qcom_nandc.txt

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* Qualcomm NAND controller



Required properties:

- compatible:		must be one of the following:

    * "qcom,ipq806x-nand" - for EBI2 NAND controller being used in IPQ806x

			    SoC and it uses ADM DMA

    * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in

                            IPQ4019 SoC and it uses BAM DMA

    * "qcom,ipq6018-nand" - for QPIC NAND controller v1.5.0 being used in

                            IPQ6018 SoC and it uses BAM DMA

    * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in

                            IPQ8074 SoC and it uses BAM DMA

    * "qcom,sdx55-nand"   - for QPIC NAND controller v2.0.0 being used in

                            SDX55 SoC and it uses BAM DMA



- reg:			MMIO address range

- clocks:		must contain core clock and always on clock

- clock-names:		must contain "core" for the core clock and "aon" for the

			always on clock



EBI2 specific properties:

- dmas:			DMA specifier, consisting of a phandle to the ADM DMA

			controller node and the channel number to be used for

			NAND. Refer to dma.txt and qcom_adm.txt for more details

- dma-names:		must be "rxtx"

- qcom,cmd-crci:	must contain the ADM command type CRCI block instance

			number specified for the NAND controller on the given

			platform

- qcom,data-crci:	must contain the ADM data type CRCI block instance

			number specified for the NAND controller on the given

			platform



QPIC specific properties:

- dmas:			DMA specifier, consisting of a phandle to the BAM DMA

			and the channel number to be used for NAND. Refer to

			dma.txt, qcom_bam_dma.txt for more details

- dma-names:		must contain all 3 channel names : "tx", "rx", "cmd"

- #address-cells:	<1> - subnodes give the chip-select number

- #size-cells:		<0>



* NAND chip-select



Each controller may contain one or more subnodes to represent enabled

chip-selects which (may) contain NAND flash chips. Their properties are as

follows.



Required properties:

- reg:			a single integer representing the chip-select

			number (e.g., 0, 1, 2, etc.)

- #address-cells:	see partition.txt

- #size-cells:		see partition.txt



Optional properties:

- nand-bus-width:	see nand-controller.yaml

- nand-ecc-strength:	see nand-controller.yaml. If not specified, then ECC strength will

			be used according to chip requirement and available

			OOB size.



Each nandcs device node may optionally contain a 'partitions' sub-node, which

further contains sub-nodes describing the flash partition mapping. See

partition.txt for more detail.



Example:



nand-controller@1ac00000 {

	compatible = "qcom,ipq806x-nand";

	reg = <0x1ac00000 0x800>;



	clocks = <&gcc EBI2_CLK>,

		 <&gcc EBI2_AON_CLK>;

	clock-names = "core", "aon";



	dmas = <&adm_dma 3>;

	dma-names = "rxtx";

	qcom,cmd-crci = <15>;

	qcom,data-crci = <3>;



	#address-cells = <1>;

	#size-cells = <0>;



	nand@0 {

		reg = <0>;



		nand-ecc-strength = <4>;

		nand-bus-width = <8>;



		partitions {

			compatible = "fixed-partitions";

			#address-cells = <1>;

			#size-cells = <1>;



			partition@0 {

				label = "boot-nand";

				reg = <0 0x58a0000>;

			};



			partition@58a0000 {

				label = "fs-nand";

				reg = <0x58a0000 0x4000000>;

			};

		};

	};

};



nand-controller@79b0000 {

	compatible = "qcom,ipq4019-nand";

	reg = <0x79b0000 0x1000>;



	clocks = <&gcc GCC_QPIC_CLK>,

		<&gcc GCC_QPIC_AHB_CLK>;

	clock-names = "core", "aon";



	dmas = <&qpicbam 0>,

		<&qpicbam 1>,

		<&qpicbam 2>;

	dma-names = "tx", "rx", "cmd";



	#address-cells = <1>;

	#size-cells = <0>;



	nand@0 {

		reg = <0>;

		nand-ecc-strength = <4>;

		nand-bus-width = <8>;



		partitions {

			compatible = "fixed-partitions";

			#address-cells = <1>;

			#size-cells = <1>;



			partition@0 {

				label = "boot-nand";

				reg = <0 0x58a0000>;

			};



			partition@58a0000 {

				label = "fs-nand";

				reg = <0x58a0000 0x4000000>;

			};

		};

	};

};