Commit 06b7a568 authored by Fuad Tabba's avatar Fuad Tabba Committed by Will Deacon
Browse files

arm64: Move documentation of dcache_by_line_op 



The comment describing the macro dcache_by_line_op is placed
right before the previous macro of the one it describes, which is
a bit confusing. Move it to the macro it describes (dcache_by_line_op).

No functional change intended.

Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarFuad Tabba <tabba@google.com>
Reviewed-by: default avatarArd Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20210524083001.2586635-9-tabba@google.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 55272ecc

arch/arm64/include/asm/assembler.h

+8 −8
Original line number Diff line number Diff line
@@ -387,6 +387,14 @@ alternative_cb_end 
	bfi	\tcr, \tmp0, \pos, #3

	.endm



	.macro __dcache_op_workaround_clean_cache, op, addr

alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE

	dc	\op, \addr

alternative_else

	dc	civac, \addr

alternative_endif

	.endm



/*

 * Macro to perform a data cache maintenance for the interval

 * [addr, addr + size)
@@ -398,14 +406,6 @@ alternative_cb_end 
 * 	fixup:		optional label to branch to on user fault

 * 	Corrupts:	addr, size, tmp1, tmp2

 */

	.macro __dcache_op_workaround_clean_cache, op, addr

alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE

	dc	\op, \addr

alternative_else

	dc	civac, \addr

alternative_endif

	.endm



	.macro dcache_by_line_op op, domain, addr, size, tmp1, tmp2, fixup

	dcache_line_size \tmp1, \tmp2

	add	\size, \addr, \size