Commit 06a9a229 authored by Lucas Stach's avatar Lucas Stach Committed by Shawn Guo
Browse files

soc: imx: imx8m-blk-ctrl: set LCDIF panic read hurry level



When the LCDIF block signals a panic condition due to the display FIFO
falling below the threshold, the priority at the NoC level is boosted
to the value set in the LCDIF_ARCACHE_CTRL register of i.MX8MP mediamix
blk-ctrl. Same as all other blk-ctrl registers this register is reset
when the domain is powered down. Initialize the panic hurry levels for
both LCIF interfaces to the maximium priority (same as downstream TF-A
and proven to work with the other priorities set in the interconnect
driver) when coming back from power down.

Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Reviewed-by: default avatarMarco Felsch <m.felsch@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 2cbee26e
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+21 −6
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@
 * Copyright 2021 Pengutronix, Lucas Stach <kernel@pengutronix.de>
 */

#include <linux/bitfield.h>
#include <linux/device.h>
#include <linux/interconnect.h>
#include <linux/module.h>
@@ -654,6 +655,10 @@ static const struct imx8m_blk_ctrl_data imx8mn_disp_blk_ctl_dev_data = {
	.num_domains = ARRAY_SIZE(imx8mn_disp_blk_ctl_domain_data),
};

#define LCDIF_ARCACHE_CTRL	0x4c
#define  LCDIF_1_RD_HURRY	GENMASK(15, 13)
#define  LCDIF_0_RD_HURRY	GENMASK(12, 10)

static int imx8mp_media_power_notifier(struct notifier_block *nb,
				unsigned long action, void *data)
{
@@ -667,14 +672,24 @@ static int imx8mp_media_power_notifier(struct notifier_block *nb,
	regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(8));
	regmap_set_bits(bc->regmap, BLK_SFT_RSTN, BIT(8));

	if (action == GENPD_NOTIFY_ON) {
		/*
		 * On power up we have no software backchannel to the GPC to
		 * wait for the ADB handshake to happen, so we just delay for a
		 * bit. On power down the GPC driver waits for the handshake.
		 */
	if (action == GENPD_NOTIFY_ON)
		udelay(5);

		/*
		 * Set panic read hurry level for both LCDIF interfaces to
		 * maximum priority to minimize chances of display FIFO
		 * underflow.
		 */
		regmap_set_bits(bc->regmap, LCDIF_ARCACHE_CTRL,
				FIELD_PREP(LCDIF_1_RD_HURRY, 7) |
				FIELD_PREP(LCDIF_0_RD_HURRY, 7));
	}

	return NOTIFY_OK;
}