Commit 05f333b7 authored by Vinod Koul's avatar Vinod Koul Committed by Bjorn Andersson
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arm64: dts: qcom: sm8150: add ethernet node 



SM8150 SoC supports ethqos ethernet controller so add the node for it

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
[bhsharma: Correct ethernet interrupt numbers and add power-domain]
Signed-off-by: default avatarBhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325163537.1579969-2-bhupesh.sharma@linaro.org
parent 606efee9

arch/arm64/boot/dts/qcom/sm8150.dtsi

+27 −0
Original line number Diff line number Diff line
@@ -915,6 +915,33 @@ 
			status = "disabled";

		};



		ethernet: ethernet@20000 {

			compatible = "qcom,sm8150-ethqos";

			reg = <0x0 0x00020000 0x0 0x10000>,

			      <0x0 0x00036000 0x0 0x100>;

			reg-names = "stmmaceth", "rgmii";

			clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";

			clocks = <&gcc GCC_EMAC_AXI_CLK>,

				<&gcc GCC_EMAC_SLV_AHB_CLK>,

				<&gcc GCC_EMAC_PTP_CLK>,

				<&gcc GCC_EMAC_RGMII_CLK>;

			interrupts = <GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "macirq", "eth_lpi";



			power-domains = <&gcc EMAC_GDSC>;

			resets = <&gcc GCC_EMAC_BCR>;



			iommus = <&apps_smmu 0x3C0 0x0>;



			snps,tso;

			rx-fifo-depth = <4096>;

			tx-fifo-depth = <4096>;



			status = "disabled";

		};





		qupv3_id_0: geniqup@8c0000 {

			compatible = "qcom,geni-se-qup";

			reg = <0x0 0x008c0000 0x0 0x6000>;