Commit 05e91e7f authored by Wei Li's avatar Wei Li Committed by Arnaldo Carvalho de Melo
Browse files

perf arm-spe: Add support for ARMv8.3-SPE 



This patch is to support Armv8.3 extension for SPE, it adds alignment
field in the Events packet and it supports the Scalable Vector Extension
(SVE) for Operation packet and Events packet with two additions:

  - The vector length for SVE operations in the Operation Type packet;
  - The incomplete predicate and empty predicate fields in the Events
    packet.

Signed-off-by: default avatarWei Li <liwei391@huawei.com>
Signed-off-by: default avatarLeo Yan <leo.yan@linaro.org>
Reviewed-by: default avatarAndre Przywara <andre.przywara@arm.com>
Acked-by: default avatarWill Deacon <will@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Al Grant <Al.Grant@arm.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Dave Martin <Dave.Martin@arm.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20201119152441.6972-17-leo.yan@linaro.org


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 3601e605

tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c

+34 −2
Original line number Diff line number Diff line
@@ -317,6 +317,12 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet, 
		arm_spe_pkt_out_string(&err, &buf, &buf_len, " LLC-REFILL");

	if (payload & BIT(EV_REMOTE_ACCESS))

		arm_spe_pkt_out_string(&err, &buf, &buf_len, " REMOTE-ACCESS");

	if (payload & BIT(EV_ALIGNMENT))

		arm_spe_pkt_out_string(&err, &buf, &buf_len, " ALIGNMENT");

	if (payload & BIT(EV_PARTIAL_PREDICATE))

		arm_spe_pkt_out_string(&err, &buf, &buf_len, " SVE-PARTIAL-PRED");

	if (payload & BIT(EV_EMPTY_PREDICATE))

		arm_spe_pkt_out_string(&err, &buf, &buf_len, " SVE-EMPTY-PRED");



	return err;

}
@@ -329,8 +335,23 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, 


	switch (packet->index) {

	case SPE_OP_PKT_HDR_CLASS_OTHER:

		arm_spe_pkt_out_string(&err, &buf, &buf_len,

			payload & SPE_OP_PKT_COND ? "COND-SELECT" : "INSN-OTHER");

		if (SPE_OP_PKT_IS_OTHER_SVE_OP(payload)) {

			arm_spe_pkt_out_string(&err, &buf, &buf_len, "SVE-OTHER");



			/* SVE effective vector length */

			arm_spe_pkt_out_string(&err, &buf, &buf_len, " EVLEN %d",

					       SPE_OP_PKG_SVE_EVL(payload));



			if (payload & SPE_OP_PKT_SVE_FP)

				arm_spe_pkt_out_string(&err, &buf, &buf_len, " FP");

			if (payload & SPE_OP_PKT_SVE_PRED)

				arm_spe_pkt_out_string(&err, &buf, &buf_len, " PRED");

		} else {

			arm_spe_pkt_out_string(&err, &buf, &buf_len, "OTHER");

			arm_spe_pkt_out_string(&err, &buf, &buf_len, " %s",

					       payload & SPE_OP_PKT_COND ?

					       "COND-SELECT" : "INSN-OTHER");

		}

		break;

	case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC:

		arm_spe_pkt_out_string(&err, &buf, &buf_len,
@@ -361,6 +382,17 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, 
		default:

			break;

		}



		if (SPE_OP_PKT_IS_LDST_SVE(payload)) {

			/* SVE effective vector length */

			arm_spe_pkt_out_string(&err, &buf, &buf_len, " EVLEN %d",

					       SPE_OP_PKG_SVE_EVL(payload));



			if (payload & SPE_OP_PKT_SVE_PRED)

				arm_spe_pkt_out_string(&err, &buf, &buf_len, " PRED");

			if (payload & SPE_OP_PKT_SVE_SG)

				arm_spe_pkt_out_string(&err, &buf, &buf_len, " SG");

		}

		break;

	case SPE_OP_PKT_HDR_CLASS_BR_ERET:

		arm_spe_pkt_out_string(&err, &buf, &buf_len, "B");

tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h

+16 −0
Original line number Diff line number Diff line
@@ -113,6 +113,8 @@ enum arm_spe_events { 
#define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC	0x1

#define SPE_OP_PKT_HDR_CLASS_BR_ERET		0x2



#define SPE_OP_PKT_IS_OTHER_SVE_OP(v)		(((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x8)



#define SPE_OP_PKT_COND				BIT(0)



#define SPE_OP_PKT_LDST_SUBCLASS_GET(v)		((v) & GENMASK_ULL(7, 1))
@@ -128,6 +130,20 @@ enum arm_spe_events { 
#define SPE_OP_PKT_AT				BIT(2)

#define SPE_OP_PKT_ST				BIT(0)



#define SPE_OP_PKT_IS_LDST_SVE(v)		(((v) & (BIT(3) | BIT(1))) == 0x8)



#define SPE_OP_PKT_SVE_SG			BIT(7)

/*

 * SVE effective vector length (EVL) is stored in byte 0 bits [6:4];

 * the length is rounded up to a power of two and use 32 as one step,

 * so EVL calculation is:

 *

 *   32 * (2 ^ bits [6:4]) = 32 << (bits [6:4])

 */

#define SPE_OP_PKG_SVE_EVL(v)			(32 << (((v) & GENMASK_ULL(6, 4)) >> 4))

#define SPE_OP_PKT_SVE_PRED			BIT(2)

#define SPE_OP_PKT_SVE_FP			BIT(1)



#define SPE_OP_PKT_IS_INDIRECT_BRANCH(v)	(((v) & GENMASK_ULL(7, 1)) == 0x2)



const char *arm_spe_pkt_name(enum arm_spe_pkt_type);