Commit 059e5c32 authored by Brijesh Singh's avatar Brijesh Singh Committed by Borislav Petkov
Browse files

x86/msr: Rename MSR_K8_SYSCFG to MSR_AMD64_SYSCFG 



The SYSCFG MSR continued being updated beyond the K8 family; drop the K8
name from it.

Suggested-by: default avatarBorislav Petkov <bp@alien8.de>
Signed-off-by: default avatarBrijesh Singh <brijesh.singh@amd.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Acked-by: default avatarJoerg Roedel <jroedel@suse.de>
Link: https://lkml.kernel.org/r/20210427111636.1207-4-brijesh.singh@amd.com
parent b81fc74d

Documentation/virt/kvm/amd-memory-encryption.rst

+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ to SEV:: 
		  [ecx]:

			Bits[31:0]  Number of encrypted guests supported simultaneously



If support for SEV is present, MSR 0xc001_0010 (MSR_K8_SYSCFG) and MSR 0xc001_0015

If support for SEV is present, MSR 0xc001_0010 (MSR_AMD64_SYSCFG) and MSR 0xc001_0015

(MSR_K7_HWCR) can be used to determine if it can be enabled::



	0xc001_0010:

Documentation/x86/amd-memory-encryption.rst

+3 −3
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ CPUID function 0x8000001f reports information related to SME:: 
			   system physical addresses, not guest physical

			   addresses)



If support for SME is present, MSR 0xc00100010 (MSR_K8_SYSCFG) can be used to

If support for SME is present, MSR 0xc00100010 (MSR_AMD64_SYSCFG) can be used to

determine if SME is enabled and/or to enable memory encryption::



	0xc0010010:
@@ -79,7 +79,7 @@ The state of SME in the Linux kernel can be documented as follows: 
	  The CPU supports SME (determined through CPUID instruction).



	- Enabled:

	  Supported and bit 23 of MSR_K8_SYSCFG is set.

	  Supported and bit 23 of MSR_AMD64_SYSCFG is set.



	- Active:

	  Supported, Enabled and the Linux kernel is actively applying
@@ -89,7 +89,7 @@ The state of SME in the Linux kernel can be documented as follows: 
SME can also be enabled and activated in the BIOS. If SME is enabled and

activated in the BIOS, then all memory accesses will be encrypted and it will

not be necessary to activate the Linux memory encryption support.  If the BIOS

merely enables SME (sets bit 23 of the MSR_K8_SYSCFG), then Linux can activate

merely enables SME (sets bit 23 of the MSR_AMD64_SYSCFG), then Linux can activate

memory encryption by default (CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT=y) or

by supplying mem_encrypt=on on the kernel command line.  However, if BIOS does

not enable SME, then Linux will not be able to activate memory encryption, even

arch/x86/include/asm/msr-index.h

+3 −3
Original line number Diff line number Diff line
@@ -537,9 +537,9 @@ 
/* K8 MSRs */

#define MSR_K8_TOP_MEM1			0xc001001a

#define MSR_K8_TOP_MEM2			0xc001001d

#define MSR_K8_SYSCFG			0xc0010010

#define MSR_K8_SYSCFG_MEM_ENCRYPT_BIT	23

#define MSR_K8_SYSCFG_MEM_ENCRYPT	BIT_ULL(MSR_K8_SYSCFG_MEM_ENCRYPT_BIT)

#define MSR_AMD64_SYSCFG		0xc0010010

#define MSR_AMD64_SYSCFG_MEM_ENCRYPT_BIT	23

#define MSR_AMD64_SYSCFG_MEM_ENCRYPT	BIT_ULL(MSR_AMD64_SYSCFG_MEM_ENCRYPT_BIT)

#define MSR_K8_INT_PENDING_MSG		0xc0010055

/* C1E active bits in int pending message */

#define K8_INTP_C1E_ACTIVE_MASK		0x18000000

arch/x86/kernel/cpu/amd.c

+2 −2
Original line number Diff line number Diff line
@@ -593,8 +593,8 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c) 
	 */

	if (cpu_has(c, X86_FEATURE_SME) || cpu_has(c, X86_FEATURE_SEV)) {

		/* Check if memory encryption is enabled */

		rdmsrl(MSR_K8_SYSCFG, msr);

		if (!(msr & MSR_K8_SYSCFG_MEM_ENCRYPT))

		rdmsrl(MSR_AMD64_SYSCFG, msr);

		if (!(msr & MSR_AMD64_SYSCFG_MEM_ENCRYPT))

			goto clear_all;



		/*

arch/x86/kernel/cpu/mtrr/cleanup.c

+1 −1
Original line number Diff line number Diff line
@@ -836,7 +836,7 @@ int __init amd_special_default_mtrr(void) 
	if (boot_cpu_data.x86 < 0xf)

		return 0;

	/* In case some hypervisor doesn't pass SYSCFG through: */

	if (rdmsr_safe(MSR_K8_SYSCFG, &l, &h) < 0)

	if (rdmsr_safe(MSR_AMD64_SYSCFG, &l, &h) < 0)

		return 0;

	/*

	 * Memory between 4GB and top of mem is forced WB by this magic bit.