Commit 058de325 authored by Amit Cohen's avatar Amit Cohen Committed by David S. Miller
Browse files

mlxsw: Configure egress FID classification after routing 



After routing, a packet needs to perform an L2 lookup using the DMAC it got
from the routing and a FID. In unified bridge model, the egress FID
configuration needs to be performed by software.

It is configured by RITR for both sub-port RIFs and FID RIFs. Currently
FID RIFs already configure eFID. Add eFID configuration for sub-port RIFs.

Signed-off-by: default avatarAmit Cohen <amcohen@nvidia.com>
Reviewed-by: default avatarPetr Machata <petrm@nvidia.com>
Signed-off-by: default avatarIdo Schimmel <idosch@nvidia.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2c3ae763

drivers/net/ethernet/mellanox/mlxsw/reg.h

+2 −1
Original line number Diff line number Diff line
@@ -7113,10 +7113,11 @@ static inline void mlxsw_reg_ritr_rif_pack(char *payload, u16 rif) 
}



static inline void mlxsw_reg_ritr_sp_if_pack(char *payload, bool lag,

					     u16 system_port, u16 vid)

					     u16 system_port, u16 efid, u16 vid)

{

	mlxsw_reg_ritr_sp_if_lag_set(payload, lag);

	mlxsw_reg_ritr_sp_if_system_port_set(payload, system_port);

	mlxsw_reg_ritr_sp_if_efid_set(payload, efid);

	mlxsw_reg_ritr_sp_if_vid_set(payload, vid);

}

drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c

+3 −0
Original line number Diff line number Diff line
@@ -9316,15 +9316,18 @@ static int mlxsw_sp_rif_subport_op(struct mlxsw_sp_rif *rif, bool enable) 
	struct mlxsw_sp *mlxsw_sp = rif->mlxsw_sp;

	struct mlxsw_sp_rif_subport *rif_subport;

	char ritr_pl[MLXSW_REG_RITR_LEN];

	u16 efid;



	rif_subport = mlxsw_sp_rif_subport_rif(rif);

	mlxsw_reg_ritr_pack(ritr_pl, enable, MLXSW_REG_RITR_SP_IF,

			    rif->rif_index, rif->vr_id, rif->dev->mtu);

	mlxsw_reg_ritr_mac_pack(ritr_pl, rif->dev->dev_addr);

	mlxsw_reg_ritr_if_mac_profile_id_set(ritr_pl, rif->mac_profile_id);

	efid = mlxsw_sp->ubridge ? mlxsw_sp_fid_index(rif->fid) : 0;

	mlxsw_reg_ritr_sp_if_pack(ritr_pl, rif_subport->lag,

				  rif_subport->lag ? rif_subport->lag_id :

						     rif_subport->system_port,

				  efid,

				  mlxsw_sp->ubridge ? 0 : rif_subport->vid);



	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);