Commit 0512aadd authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
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powerpc/40x: Prepare normal exception handler for enabling MMU early



Ensure normal exception handler are able to manage stuff with
MMU enabled. For that we use CONFIG_VMAP_STACK related code
allthough there is no intention to really activate CONFIG_VMAP_STACK
on powerpc 40x for the moment.

40x uses SPRN_DEAR instead of SPRN_DAR and SPRN_ESR instead of
SPRN_DSISR. Take it into account in common macros.

40x MSR value doesn't fit on 15 bits, use LOAD_REG_IMMEDIATE() in
common macros that will be used also with 40x.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/01963af2b83037bca270d7bf1336ffcf35da8282.1615552866.git.christophe.leroy@csgroup.eu
parent 0fc1e934
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+1 −1
Original line number Diff line number Diff line
@@ -162,7 +162,7 @@ transfer_to_handler:
	li	r12,-1			/* clear all pending debug events */
	mtspr	SPRN_DBSR,r12
	lis	r11,global_dbcr0@ha
	tophys(r11,r11)
	tophys_novmstack r11,r11
	addi	r11,r11,global_dbcr0@l
#ifdef CONFIG_SMP
	lwz	r9,TASK_CPU(r2)
+14 −1
Original line number Diff line number Diff line
@@ -22,9 +22,17 @@
#ifdef CONFIG_VMAP_STACK
	mfspr	r10, SPRN_SPRG_THREAD
	.if	\handle_dar_dsisr
#ifdef CONFIG_40x
	mfspr	r11, SPRN_DEAR
#else
	mfspr	r11, SPRN_DAR
#endif
	stw	r11, DAR(r10)
#ifdef CONFIG_40x
	mfspr	r11, SPRN_ESR
#else
	mfspr	r11, SPRN_DSISR
#endif
	stw	r11, DSISR(r10)
	.endif
	mfspr	r11, SPRN_SRR0
@@ -61,7 +69,7 @@

.macro EXCEPTION_PROLOG_2 handle_dar_dsisr=0
#ifdef CONFIG_VMAP_STACK
	li	r11, MSR_KERNEL & ~(MSR_IR | MSR_RI) /* can take DTLB miss */
	LOAD_REG_IMMEDIATE(r11, MSR_KERNEL & ~(MSR_IR | MSR_RI)) /* can take DTLB miss */
	mtmsr	r11
	isync
	mfspr	r11, SPRN_SPRG_SCRATCH2
@@ -158,8 +166,13 @@

.macro save_dar_dsisr_on_stack reg1, reg2, sp
#ifndef CONFIG_VMAP_STACK
#ifdef CONFIG_40x
	mfspr	\reg1, SPRN_DEAR
	mfspr	\reg2, SPRN_ESR
#else
	mfspr	\reg1, SPRN_DAR
	mfspr	\reg2, SPRN_DSISR
#endif
	stw	\reg1, _DAR(\sp)
	stw	\reg2, _DSISR(\sp)
#endif
+6 −11
Original line number Diff line number Diff line
@@ -221,11 +221,8 @@ _ENTRY(saved_ksp_limit)
 * if they can't resolve the lightweight TLB fault.
 */
	START_EXCEPTION(0x0300,	DataStorage)
	EXCEPTION_PROLOG
	mfspr	r5, SPRN_ESR		/* Grab the ESR, save it */
	stw	r5, _ESR(r11)
	mfspr	r4, SPRN_DEAR		/* Grab the DEAR, save it */
	stw	r4, _DEAR(r11)
	EXCEPTION_PROLOG handle_dar_dsisr=1
	save_dar_dsisr_on_stack	r4, r5, r11
	EXC_XFER_LITE(0x300, handle_page_fault)

/*
@@ -244,17 +241,15 @@ _ENTRY(saved_ksp_limit)

/* 0x0600 - Alignment Exception */
	START_EXCEPTION(0x0600, Alignment)
	EXCEPTION_PROLOG
	mfspr	r4,SPRN_DEAR		/* Grab the DEAR and save it */
	stw	r4,_DEAR(r11)
	EXCEPTION_PROLOG handle_dar_dsisr=1
	save_dar_dsisr_on_stack r4, r5, r11
	addi	r3,r1,STACK_FRAME_OVERHEAD
	EXC_XFER_STD(0x600, alignment_exception)

/* 0x0700 - Program Exception */
	START_EXCEPTION(0x0700, ProgramCheck)
	EXCEPTION_PROLOG
	mfspr	r4,SPRN_ESR		/* Grab the ESR and save it */
	stw	r4,_ESR(r11)
	EXCEPTION_PROLOG handle_dar_dsisr=1
	save_dar_dsisr_on_stack r4, r5, r11
	addi	r3,r1,STACK_FRAME_OVERHEAD
	EXC_XFER_STD(0x700, program_check_exception)