Unverified Commit 050bbd6e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'amlogic-drivers-for-v6.3' of... 

Merge tag 'amlogic-drivers-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers

Amlogic Drivers changes for v6.3:
- Merge of immutable bindings branch with Reset & power domain binding
- Addition of NNA power domain for A311D SoC
- meson_sm.txt  conversionto dt-schema
- mark amlogic,meson-gx-pwrc bindings as deprecated
- fix of meson_sm driver by using NULL instead of 0

* tag 'amlogic-drivers-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  firmware: meson_sm: stop using 0 as NULL pointer
  dt-bindings: power: amlogic,meson-gx-pwrc: mark bindings as deprecated
  dt-bindings: firmware: convert meson_sm.txt to dt-schema
  soc: amlogic: meson-pwrc: Add NNA power domain for A311D
  dt-bindings: power: Add G12A NNA power domain
  dt-bindings: reset: meson-g12a: Add missing NNA reset

Link: https://lore.kernel.org/r/ec9552d8-96df-a677-ab94-9723f5c30f1c@linaro.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents e0530b9e fcdc53ac

Documentation/devicetree/bindings/firmware/amlogic,meson-gxbb-sm.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/firmware/amlogic,meson-gxbb-sm.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Amlogic Secure Monitor (SM)



description:

  In the Amlogic SoCs the Secure Monitor code is used to provide access to the

  NVMEM, enable JTAG, set USB boot, etc...



maintainers:

  - Neil Armstrong <neil.armstrong@linaro.org>



properties:

  compatible:

    oneOf:

      - const: amlogic,meson-gxbb-sm

      - items:

          - const: amlogic,meson-gx-sm

          - const: amlogic,meson-gxbb-sm



  power-controller:

    type: object

    $ref: /schemas/power/amlogic,meson-sec-pwrc.yaml#



required:

  - compatible



additionalProperties: false



examples:

  - |

    firmware {

        secure-monitor {

            compatible = "amlogic,meson-gxbb-sm";

        };

    };

Documentation/devicetree/bindings/firmware/meson/meson_sm.txt

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* Amlogic Secure Monitor



In the Amlogic SoCs the Secure Monitor code is used to provide access to the

NVMEM, enable JTAG, set USB boot, etc...



Required properties for the secure monitor node:

- compatible: Should be "amlogic,meson-gxbb-sm"



Example:



	firmware {

		sm: secure-monitor {

			compatible = "amlogic,meson-gxbb-sm";

		};

	};

Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt

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Amlogic Meson Power Controller

Amlogic Meson Power Controller (deprecated)

==============================

===========================================





The Amlogic Meson SoCs embeds an internal Power domain controller.

The Amlogic Meson SoCs embeds an internal Power domain controller.

drivers/firmware/meson/meson_sm.c

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@@ -82,7 +82,7 @@ static void __iomem *meson_sm_map_shmem(u32 cmd_shmem, unsigned int size) 




	sm_phy_base = __meson_sm_call(cmd_shmem, 0, 0, 0, 0, 0);

	sm_phy_base = __meson_sm_call(cmd_shmem, 0, 0, 0, 0, 0);

	if (!sm_phy_base)

	if (!sm_phy_base)

		return 0;

		return NULL;





	return ioremap_cache(sm_phy_base, size);

	return ioremap_cache(sm_phy_base, size);

}

}

drivers/soc/amlogic/meson-ee-pwrc.c

+17 −0
Original line number Original line Diff line number Diff line
@@ -46,6 +46,9 @@ 
#define HHI_NANOQ_MEM_PD_REG1		(0x47 << 2)

#define HHI_NANOQ_MEM_PD_REG1		(0x47 << 2)

#define HHI_VPU_MEM_PD_REG2		(0x4d << 2)

#define HHI_VPU_MEM_PD_REG2		(0x4d << 2)





#define G12A_HHI_NANOQ_MEM_PD_REG0	(0x43 << 2)

#define G12A_HHI_NANOQ_MEM_PD_REG1	(0x44 << 2)



struct meson_ee_pwrc;

struct meson_ee_pwrc;

struct meson_ee_pwrc_domain;

struct meson_ee_pwrc_domain;
@@ -106,6 +109,13 @@ static struct meson_ee_pwrc_top_domain sm1_pwrc_usb = SM1_EE_PD(17); 
static struct meson_ee_pwrc_top_domain sm1_pwrc_pci = SM1_EE_PD(18);

static struct meson_ee_pwrc_top_domain sm1_pwrc_pci = SM1_EE_PD(18);

static struct meson_ee_pwrc_top_domain sm1_pwrc_ge2d = SM1_EE_PD(19);

static struct meson_ee_pwrc_top_domain sm1_pwrc_ge2d = SM1_EE_PD(19);





static struct meson_ee_pwrc_top_domain g12a_pwrc_nna = {

	.sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0,

	.sleep_mask = BIT(16) | BIT(17),

	.iso_reg = GX_AO_RTI_GEN_PWR_ISO0,

	.iso_mask = BIT(16) | BIT(17),

};



/* Memory PD Domains */

/* Memory PD Domains */





#define VPU_MEMPD(__reg)					\

#define VPU_MEMPD(__reg)					\
@@ -217,6 +227,11 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = { 
	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(27, 26) },

	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(27, 26) },

};

};





static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = {

	{ G12A_HHI_NANOQ_MEM_PD_REG0, GENMASK(31, 0) },

	{ G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(23, 0) },

};



#define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks)	\

#define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks)	\

	{								\

	{								\

		.name = __name,						\

		.name = __name,						\
@@ -253,6 +268,8 @@ static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = { 
	[PWRC_G12A_VPU_ID]  = VPU_PD("VPU", &gx_pwrc_vpu, g12a_pwrc_mem_vpu,

	[PWRC_G12A_VPU_ID]  = VPU_PD("VPU", &gx_pwrc_vpu, g12a_pwrc_mem_vpu,

				     pwrc_ee_is_powered_off, 11, 2),

				     pwrc_ee_is_powered_off, 11, 2),

	[PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),

	[PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),

	[PWRC_G12A_NNA_ID] = TOP_PD("NNA", &g12a_pwrc_nna, g12a_pwrc_mem_nna,

				    pwrc_ee_is_powered_off),

};

};





static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {

static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {