Commit 04aa946d authored by Haibo Chen's avatar Haibo Chen Committed by Shawn Guo
Browse files

arm64: dts: imx8: change the spi-nor tx



Before commit 0e30f472 ("mtd: spi-nor: add support for DTR protocol"),
for all PP command, it only support 1-1-1 mode, no matter the tx setting
in dts. But after the upper commit, the logic change. It will choose
the best mode(fastest mode) which flash device and spi-nor host controller
both support.

qspi and fspi host controller do not support read 1-4-4 mode. so need to
set the tx to 1, let the common code finally select read 1-1-4 mode.

Signed-off-by: default avatarHaibo Chen <haibo.chen@nxp.com>
Fixes: 0e30f472 ("mtd: spi-nor: add support for DTR protocol")
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent b2a4f4a3
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+1 −1
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <80000000>;
		spi-tx-bus-width = <4>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
	};
};
+1 −1
Original line number Diff line number Diff line
@@ -48,7 +48,7 @@
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <80000000>;
		spi-tx-bus-width = <4>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
	};
};
+1 −1
Original line number Diff line number Diff line
@@ -101,7 +101,7 @@
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <80000000>;
		spi-tx-bus-width = <4>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
	};
};
+1 −1
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <80000000>;
		spi-tx-bus-width = <4>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
	};
};
+2 −0
Original line number Diff line number Diff line
@@ -337,6 +337,8 @@
		#size-cells = <1>;
		compatible = "micron,n25q256a", "jedec,spi-nor";
		spi-max-frequency = <29000000>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
	};
};

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