Commit 04a357b1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mips_6.3_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux 

Pull more MIPS updates from Thomas Bogendoerfer:
 "A few more cleanups and fixes"

* tag 'mips_6.3_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: Workaround clang inline compat branch issue
  mips: dts: ralink: mt7621: add phandle to system controller node for watchdog
  mips: dts: ralink: mt7621: rename watchdog node from 'wdt' into 'watchdog'
  mips: ralink: make SOC_MT7621 select PINCTRL
  mips: remove SYS_HAS_CPU_MIPS32_R1 from RALINK
  MIPS: cevt-r4k: Offset the value used to clear compare interrupt
  MIPS: smp-cps: Don't rely on CP0_CMGCRBASE
  MIPS: Remove DMA_PERDEV_COHERENT
parents 857f1268 1a2c73f4

arch/mips/Kconfig

+4 −6
Original line number Diff line number Diff line
@@ -610,7 +610,6 @@ config RALINK 
	select DMA_NONCOHERENT

	select IRQ_MIPS_CPU

	select USE_OF

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_HAS_CPU_MIPS32_R2

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -1080,11 +1079,6 @@ config FW_CFE 
config ARCH_SUPPORTS_UPROBES

	bool



config DMA_PERDEV_COHERENT

	bool

	select ARCH_HAS_SETUP_DMA_OPS

	select DMA_NONCOHERENT



config DMA_NONCOHERENT

	bool

	#
@@ -3206,6 +3200,10 @@ config CC_HAS_MNO_BRANCH_LIKELY 
	def_bool y

	depends on $(cc-option,-mno-branch-likely)



# https://github.com/llvm/llvm-project/issues/61045

config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH

	def_bool y if CC_IS_CLANG



menu "Power management options"



config ARCH_HIBERNATION_POSSIBLE

arch/mips/boot/dts/ralink/mt7621.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -70,9 +70,10 @@ 
					     "250m", "270m";

		};



		wdt: wdt@100 {

		wdt: watchdog@100 {

			compatible = "mediatek,mt7621-wdt";

			reg = <0x100 0x100>;

			mediatek,sysctl = <&sysc>;

		};



		gpio: gpio@600 {

arch/mips/include/asm/asm.h

+1 −1
Original line number Diff line number Diff line
@@ -336,7 +336,7 @@ symbol = value 
 */

#ifdef CONFIG_WAR_R10000_LLSC

# define SC_BEQZ	beqzl

#elif MIPS_ISA_REV >= 6

#elif !defined(CONFIG_CC_HAS_BROKEN_INLINE_COMPAT_BRANCH) && MIPS_ISA_REV >= 6

# define SC_BEQZ	beqzc

#else

# define SC_BEQZ	beqz

arch/mips/include/asm/smp-cps.h

+4 −0
Original line number Diff line number Diff line
@@ -7,6 +7,8 @@ 
#ifndef __MIPS_ASM_SMP_CPS_H__

#define __MIPS_ASM_SMP_CPS_H__



#define CPS_ENTRY_PATCH_INSNS	6



#ifndef __ASSEMBLY__



struct vpe_boot_config {
@@ -30,6 +32,8 @@ extern void mips_cps_boot_vpes(struct core_boot_config *cfg, unsigned vpe); 
extern void mips_cps_pm_save(void);

extern void mips_cps_pm_restore(void);



extern void *mips_cps_core_entry_patch_end;



#ifdef CONFIG_MIPS_CPS



extern bool mips_cps_smp_in_use(void);

arch/mips/kernel/cevt-r4k.c

+2 −2
Original line number Diff line number Diff line
@@ -200,7 +200,7 @@ int c0_compare_int_usable(void) 
	 */

	if (c0_compare_int_pending()) {

		cnt = read_c0_count();

		write_c0_compare(cnt);

		write_c0_compare(cnt - 1);

		back_to_back_c0_hazard();

		while (read_c0_count() < (cnt  + COMPARE_INT_SEEN_TICKS))

			if (!c0_compare_int_pending())
@@ -228,7 +228,7 @@ int c0_compare_int_usable(void) 
	if (!c0_compare_int_pending())

		return 0;

	cnt = read_c0_count();

	write_c0_compare(cnt);

	write_c0_compare(cnt - 1);

	back_to_back_c0_hazard();

	while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))

		if (!c0_compare_int_pending())