Unverified Commit 04988a23 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!1724 Net: ethernet: Support management channel of the host tool in 3snic 3s9xx network driver

Merge Pull Request from: @steven-song3 
 
3snic inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I7MVPN


CVE:NA

--------------------------------

The driver supports 3snic 3s9xx serial network cards (100GE (40GE
compatible)-3S930 and 25GE (10GE compatible)-3S910/3S920).

Feature:
1. Support firmware update and active
2. Support online log collection
3. Network card information query: Gemini information, version,
Optical module information, tx/rx queue information,
Serdes information, bond information, etc
4. Support Relevant parameter settings: tx speed limit,
port rate, port adaptive mode, setting lro aggregation
time and number, Factory reset, etc

Reviewed-by: default avatarChen Mou <chenmou@3snic.com>
Reviewed-by: default avatarWan Renyong <wanry@3snic.com>
Reviewed-by: default avatarYang Gan <yanggan@3snic.com>
Reviewed-by: default avatarWen Liang <wenliang@3snic.com>
Signed-off-by: default avatarSteven Song <steven.song@3snic.com>

==================================

Test:
compille: pass
insmod/rmmod: pass
iperf: Pass 
 
Link:https://gitee.com/openeuler/kernel/pulls/1724

 

Reviewed-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
parents de22a0cb 0c4c3ee2
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+8 −1
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
# Copyright (c) 2023 3SNIC
#
SYS_TIME=$(shell date +%Y-%m-%d_%H:%M:%S)
ccflags-y += -D __TIME_STR__=\"$(SYS_TIME)\"

ccflags-y += -I$(srctree)/drivers/net/ethernet/3snic/sssnic/hw
ccflags-y += -I$(srctree)/drivers/net/ethernet/3snic/sssnic/hw/tool
ccflags-y += -I$(srctree)/drivers/net/ethernet/3snic/sssnic/include
ccflags-y += -I$(srctree)/drivers/net/ethernet/3snic/sssnic/include/hw
ccflags-y += -I$(srctree)/drivers/net/ethernet/3snic/sssnic/include/kernel
@@ -45,4 +48,8 @@ sssdk-y := sss_hw_main.o \
			sss_common.o \
			sss_wq.o \
			sss_hwif_ceq.o \
			sss_adapter_mgmt.o
			sss_adapter_mgmt.o \
			./tool/sss_tool_main.o \
			./tool/sss_tool_chip.o \
			./tool/sss_tool_sdk.o \
			./tool/sss_tool_sm.o
+10 −3
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@
#include "sss_hw_svc_cap.h"
#include "sss_sriov_info.h"

#define SSS_MAX_FUNCTION_NUM 4096
#define SSS_MAX_FUNC 4096

struct sss_card_node {
	struct list_head node;
@@ -23,7 +23,10 @@ struct sss_card_node {
	char chip_name[IFNAMSIZ];
	u8 bus_id;
	u8 resvd[7];
	u16 func_num;
	atomic_t channel_timeout_cnt;
	void *func_handle_array[SSS_MAX_FUNC];
	void *dbgtool_info;
};

/* Structure pcidev private */
@@ -57,6 +60,11 @@ struct sss_pci_adapter {

	struct sss_sriov_info sriov_info;

	atomic_t ref_cnt;

	atomic_t uld_ref_cnt[SSS_SERVICE_TYPE_MAX];
	spinlock_t uld_lock; /* protect uld probe and remove */

	/* set when uld driver processing event */
	unsigned long uld_run_state;

@@ -65,7 +73,6 @@ struct sss_pci_adapter {
	/* lock for attach/detach uld */
	struct mutex uld_attach_mutex;

	/* spin lock for uld_attach_state access */
	spinlock_t dettach_uld_lock;
	spinlock_t dettach_uld_lock; /* spin lock for uld_attach_state access */
};
#endif
+1 −1
Original line number Diff line number Diff line
@@ -93,7 +93,7 @@ struct sss_adm_msg {
	u32				ci;

	struct semaphore				sem;

	spinlock_t			async_lock; /* protect adm msg async and sync */
	dma_addr_t						wb_state_paddr;

	dma_addr_t						head_elem_paddr;
+40 −26
Original line number Diff line number Diff line
@@ -49,6 +49,20 @@
#define SSS_CSR_DMA_ATTR_TBL_ADDR	(SSS_CSR_CFG_FLAG + 0x380)
#define SSS_CSR_DMA_ATTR_INDIR_ID_ADDR	(SSS_CSR_CFG_FLAG + 0x390)

/* CLP registers */
#define SSS_BAR3_CLP_BASE_ADDR		(SSS_MGMT_FLAG + 0x0000)

#define SSS_UCPU_CLP_SIZE_REG		(SSS_HOST_CSR_BASE_ADDR + 0x40)
#define SSS_UCPU_CLP_REQBASE_REG	(SSS_HOST_CSR_BASE_ADDR + 0x44)
#define SSS_UCPU_CLP_RSPBASE_REG	(SSS_HOST_CSR_BASE_ADDR + 0x48)
#define SSS_UCPU_CLP_REQ_REG		(SSS_HOST_CSR_BASE_ADDR + 0x4c)
#define SSS_UCPU_CLP_RSP_REG		(SSS_HOST_CSR_BASE_ADDR + 0x50)
#define SSS_CLP_REG(member)		(SSS_UCPU_CLP_##member##_REG)

#define SSS_CLP_REQ_DATA		SSS_BAR3_CLP_BASE_ADDR
#define SSS_CLP_RSP_DATA		(SSS_BAR3_CLP_BASE_ADDR + 0x1000)
#define SSS_CLP_DATA(member)		(SSS_CLP_##member##_DATA)

/* MSI-X registers */
#define SSS_CSR_MSIX_INDIR_ID_ADDR		(SSS_CSR_CFG_FLAG + 0x310)
#define SSS_CSR_MSIX_CTRL_ADDR			(SSS_CSR_CFG_FLAG + 0x300)
+16 −0
Original line number Diff line number Diff line
@@ -24,6 +24,8 @@
#include "sss_mbx_info.h"
#include "sss_mgmt_channel.h"

#define SSSNIC_CHANNEL_DETECT_PERIOD (5 * 1000)

enum sss_func_mode {
	SSS_FUNC_MOD_MIN,

@@ -81,6 +83,11 @@ struct sss_aeq_stat {
	u64	last_recv_cnt;
};

struct sss_clp_pf_to_mgmt {
	struct semaphore	clp_msg_lock;
	void			*clp_msg_buf;
};

struct sss_hwdev {
	void	*adapter_hdl; /* pointer to sss_pci_adapter or NDIS_Adapter */
	void	*pcidev_hdl; /* pointer to pcidev or Handler */
@@ -108,6 +115,7 @@ struct sss_hwdev {
	struct sss_ceq_info			*ceq_info;
	struct sss_mbx				*mbx; // mbx
	struct sss_msg_pf_to_mgmt	*pf_to_mgmt; // adm
	struct sss_clp_pf_to_mgmt *clp_pf_to_mgmt;

	struct sss_hw_stats			hw_stats;
	u8							*chip_fault_stats;
@@ -132,6 +140,8 @@ struct sss_hwdev {
	enum sss_func_mode			func_mode;

	struct sss_aeq_stat			aeq_stat;

	u16 aeq_busy_cnt;
};

#define SSS_TO_HWDEV(ptr)			((struct sss_hwdev *)(ptr)->hwdev)
@@ -220,6 +230,8 @@ enum sss_servic_bit_define {
#define SSS_IS_PPF(dev) \
		(SSS_GET_FUNC_TYPE(dev) == SSS_FUNC_TYPE_PPF)

#define SSS_GET_FUNC_ID(hwdev)		((hwdev)->hwif->attr.func_id)

#define SSS_IS_BMGW_MASTER_HOST(hwdev)	\
		((hwdev)->func_mode == SSS_FUNC_MOD_MULTI_BM_MASTER)
#define SSS_IS_BMGW_SLAVE_HOST(hwdev)	\
@@ -248,6 +260,10 @@ enum sss_servic_bit_define {
			((hwdev)->features[0] & SSS_COMM_F_CTRLQ_NUM)
#define SSS_SUPPORT_VIRTIO_VQ_SIZE(hwdev)	\
			((hwdev)->features[0] & SSS_COMM_F_VIRTIO_VQ_SIZE)
#define SSS_SUPPORT_CHANNEL_DETECT(hwdev)	\
			((hwdev)->features[0] & SSS_COMM_F_CHANNEL_DETECT)
#define SSS_SUPPORT_CLP(hwdev)	\
			((hwdev)->features[0] & SSS_COMM_F_CLP)

enum {
	SSS_CFG_FREE = 0,
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