Commit 047de3f1 authored by Christian König's avatar Christian König Committed by Christian König
Browse files

drm/amdgpu: switch DM to atomic fence helpers v2 



This gives us the standard atomic implicit and explicit fencing rules.

v2: move the wait to amdgpu_dm_atomic_commit_tail

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Cc: Roman Li <Roman.Li@amd.com>
Cc: Qingqing Zhuo <qingqing.zhuo@amd.com>
Cc: Jude Shih <shenshih@amd.com>
Cc: Wayne Lin <Wayne.Lin@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220509074712.163899-1-christian.koenig@amd.com
parent e0905322

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+10 −13
Original line number Diff line number Diff line
@@ -83,6 +83,7 @@ 
#include <drm/drm_edid.h>

#include <drm/drm_vblank.h>

#include <drm/drm_audio_component.h>

#include <drm/drm_gem_atomic_helper.h>



#if defined(CONFIG_DRM_AMD_DC_DCN)

#include "ivsrcid/dcn/irqsrcs_dcn_1_0.h"
@@ -7627,6 +7628,10 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, 
		goto error_unpin;

	}



	r = drm_gem_plane_helper_prepare_fb(plane, new_state);

	if (unlikely(r != 0))

		goto error_unpin;



	amdgpu_bo_unreserve(rbo);



	afb->address = amdgpu_bo_gpu_offset(rbo);
@@ -9160,7 +9165,6 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 
	struct dm_crtc_state *dm_old_crtc_state =

			to_dm_crtc_state(drm_atomic_get_old_crtc_state(state, pcrtc));

	int planes_count = 0, vpos, hpos;

	long r;

	unsigned long flags;

	struct amdgpu_bo *abo;

	uint32_t target_vblank, last_flip_vblank;
@@ -9235,18 +9239,6 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 
		}



		abo = gem_to_amdgpu_bo(fb->obj[0]);



		/*

		 * Wait for all fences on this FB. Do limited wait to avoid

		 * deadlock during GPU reset when this fence will not signal

		 * but we hold reservation lock for the BO.

		 */

		r = dma_resv_wait_timeout(abo->tbo.base.resv,

					  DMA_RESV_USAGE_WRITE, false,

					  msecs_to_jiffies(5000));

		if (unlikely(r <= 0))

			DRM_ERROR("Waiting for fences timed out!");



		fill_dc_plane_info_and_addr(

			dm->adev, new_plane_state,

			afb->tiling_flags,
@@ -9591,9 +9583,14 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) 
	struct dm_crtc_state *dm_old_crtc_state, *dm_new_crtc_state;

	int crtc_disable_count = 0;

	bool mode_set_reset_required = false;

	int r;



	trace_amdgpu_dm_atomic_commit_tail_begin(state);



	r = drm_atomic_helper_wait_for_fences(dev, state, false);

	if (unlikely(r))

		DRM_ERROR("Waiting for fences timed out!");



	drm_atomic_helper_update_legacy_modeset_state(dev, state);



	dm_state = dm_atomic_get_new_state(state);