Commit 045e8d10 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge tag 'drm-intel-gt-next-2023-01-18' of... 

Merge tag 'drm-intel-gt-next-2023-01-18' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

Driver Changes:

Fixes/improvements/new stuff:

- Fix workarounds on Gen2-3 (Tvrtko Ursulin)
- Fix HuC delayed load memory leaks (Daniele Ceraolo Spurio)
- Fix a BUG caused by impendance mismatch in dma_fence_wait_timeout and GuC (Janusz Krzysztofik)
- Add DG2 workarounds Wa_18018764978 and Wa_18019271663 (Matt Atwood)
- Apply recommended L3 hashing mask tuning parameters (Gen12+) (Matt Roper)
- Improve suspend / resume times with VT-d scanout workaround active (Andi Shyti, Chris Wilson)
- Silence misleading "mailbox access failed" warning in snb_pcode_read (Ashutosh Dixit)
- Fix null pointer dereference on HSW perf/OA (Umesh Nerlige Ramappa)
- Avoid trampling the ring during buffer migration (and selftests) (Chris Wilson, Matthew Auld)
- Fix DG2 visual corruption on small BAR systems by not forgetting to copy CCS aux state (Matthew Auld)
- More fixing of DG2 visual corruption by not forgetting to copy CCS aux state of backup objects (Matthew Auld)
- Fix TLB invalidation for Gen12.50 video and compute engines (Andrzej Hajda)
- Limit Wa_22012654132 to just specific steppings (Matt Roper)
- Fix userspace crashes due eviction not working under lock contention after the object locking conversion (Matthew Auld)
- Avoid double free is user deploys a corrupt GuC firmware (John Harrison)
- Fix 32-bit builds by using "%zu" to format size_t (Nirmoy Das)
- Fix a possible BUG in TTM async unbind due not reserving enough fence slots (Nirmoy Das)
- Fix potential use after free by not exposing the GEM context id to userspace too early (Rob Clark)
- Show clamped PL1 limit to the user (hwmon) (Ashutosh Dixit)
- Workaround unreliable reset on Jasperlake (Chris Wilson)
- Cover rest of SVG unit MCR registers (Gustavo Sousa)
- Avoid PXP log spam on platforms which do not support the feature (Alan Previn)
- Re-disable RC6p on Sandy Bridge to avoid GPU hangs and visual glitches (Sasa Dragic)

Future platform enablement:

- Manage uncore->lock while waiting on MCR register (Matt Roper)
- Enable Idle Messaging for GSC CS (Vinay Belgaumkar)
- Only initialize GSC in tile 0 (José Roberto de Souza)
- Media GT and Render GT share common GGTT (Aravind Iddamsetty)
- Add dedicated MCR lock (Matt Roper)
- Implement recommended caching policy (PVC) (Wayne Boyer)
- Add hardware-level lock for steering (Matt Roper)
- Check full IP version when applying hw steering semaphore (Matt Roper)
- Enable GuC GGTT invalidation from the start (Daniele Ceraolo Spurio)
- MTL GSC firmware support (Daniele Ceraolo Spurio, Jonathan Cavitt)
- MTL OA support (Umesh Nerlige Ramappa)
- MTL initial gt workarounds (Matt Roper)

Driver refactors:

- Hold forcewake and MCR lock over PPAT setup (Matt Roper)
- Acquire fw before loop in intel_uncore_read64_2x32 (Umesh Nerlige Ramappa)
- GuC filename cleanups and use submission API version number (John Harrison)
- Promote pxp subsystem to top-level of i915 (Alan Previn)
- Finish proofing the code agains object size overflows (Chris Wilson, Gwan-gyeong Mun)
- Start adding module oriented dmesg output (John Harrison)

Miscellaneous:

- Correct kerneldoc for intel_gt_mcr_wait_for_reg() (Matt Roper)
- Bump up sample period for busy stats selftest (Umesh Nerlige Ramappa)
- Make GuC default_lists const data (Jani Nikula)
- Fix table order verification to check all FW types (John Harrison)
- Remove some limited use register access wrappers (Jani Nikula)
- Remove struct_member macro (Andrzej Hajda)
- Remove hardcoded value with a macro (Nirmoy Das)
- Use helper func to find out map type (Nirmoy Das)
- Fix a static analysis warning (John Harrison)
- Consolidate VMA active tracking helpers (Andrzej Hajda)
- Do not cover all future platforms in TLB invalidation (Tvrtko Ursulin)
- Replace zero-length arrays with flexible-array members (Gustavo A. R. Silva)
- Unwind hugepages to drop wakeref on error (Chris Wilson)
- Remove a couple of superfluous i915_drm.h includes (Jani Nikula)

Merges:

- Merge drm/drm-next into drm-intel-gt-next (Rodrigo Vivi)

danvet: Fix up merge conflict in intel_uc_fw.c, we ended up with 2
copies of try_firmware_load() somehow.

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Y8fW2Ny1B1hZ5ZmF@tursulin-desk
parents 0b45ac11 378e04f7

drivers/gpu/drm/i915/Makefile

+7 −4
Original line number Diff line number Diff line
@@ -191,9 +191,9 @@ i915-y += \ 
	  i915_vma_resource.o



# general-purpose microcontroller (GuC) support

i915-y += gt/uc/intel_uc.o \

	  gt/uc/intel_uc_debugfs.o \

	  gt/uc/intel_uc_fw.o \

i915-y += \

	  gt/uc/intel_gsc_fw.o \

	  gt/uc/intel_gsc_uc.o \

	  gt/uc/intel_guc.o \

	  gt/uc/intel_guc_ads.o \

	  gt/uc/intel_guc_capture.o \
@@ -208,7 +208,10 @@ i915-y += gt/uc/intel_uc.o \ 
	  gt/uc/intel_guc_submission.o \

	  gt/uc/intel_huc.o \

	  gt/uc/intel_huc_debugfs.o \

	  gt/uc/intel_huc_fw.o

	  gt/uc/intel_huc_fw.o \

	  gt/uc/intel_uc.o \

	  gt/uc/intel_uc_debugfs.o \

	  gt/uc/intel_uc_fw.o



# graphics system controller (GSC) support

i915-y += gt/intel_gsc.o

drivers/gpu/drm/i915/display/intel_fb_pin.c

+1 −1
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb, 
		goto err;

	}



	vma->display_alignment = max_t(u64, vma->display_alignment, alignment);

	vma->display_alignment = max(vma->display_alignment, alignment);



	i915_gem_object_flush_if_display(obj);

drivers/gpu/drm/i915/display/intel_fbdev.c

+1 −1
Original line number Diff line number Diff line
@@ -286,7 +286,7 @@ static int intelfb_create(struct drm_fb_helper *helper, 


		/* Our framebuffer is the entirety of fbdev's system memory */

		info->fix.smem_start =

			(unsigned long)(ggtt->gmadr.start + vma->node.start);

			(unsigned long)(ggtt->gmadr.start + i915_ggtt_offset(vma));

		info->fix.smem_len = vma->size;

	}

drivers/gpu/drm/i915/display/skl_universal_plane.c

+1 −1
Original line number Diff line number Diff line
@@ -1848,7 +1848,7 @@ static bool bo_has_valid_encryption(struct drm_i915_gem_object *obj) 
{

	struct drm_i915_private *i915 = to_i915(obj->base.dev);



	return intel_pxp_key_check(&to_gt(i915)->pxp, obj, false) == 0;

	return intel_pxp_key_check(i915->pxp, obj, false) == 0;

}



static bool pxp_is_borked(struct drm_i915_gem_object *obj)

drivers/gpu/drm/i915/gem/i915_gem_context.c

+21 −9
Original line number Diff line number Diff line
@@ -257,7 +257,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915, 


	if (!protected) {

		pc->uses_protected_content = false;

	} else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) {

	} else if (!intel_pxp_is_enabled(i915->pxp)) {

		ret = -ENODEV;

	} else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) ||

		   !(pc->user_flags & BIT(UCONTEXT_BANNABLE))) {
@@ -271,8 +271,8 @@ static int proto_context_set_protected(struct drm_i915_private *i915, 
		 */

		pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);



		if (!intel_pxp_is_active(&to_gt(i915)->pxp))

			ret = intel_pxp_start(&to_gt(i915)->pxp);

		if (!intel_pxp_is_active(i915->pxp))

			ret = intel_pxp_start(i915->pxp);

	}



	return ret;
@@ -1688,6 +1688,10 @@ void i915_gem_init__contexts(struct drm_i915_private *i915) 
	init_contexts(&i915->gem.contexts);

}



/*

 * Note that this implicitly consumes the ctx reference, by placing

 * the ctx in the context_xa.

 */

static void gem_context_register(struct i915_gem_context *ctx,

				 struct drm_i915_file_private *fpriv,

				 u32 id)
@@ -1703,10 +1707,6 @@ static void gem_context_register(struct i915_gem_context *ctx, 
	snprintf(ctx->name, sizeof(ctx->name), "%s[%d]",

		 current->comm, pid_nr(ctx->pid));



	/* And finally expose ourselves to userspace via the idr */

	old = xa_store(&fpriv->context_xa, id, ctx, GFP_KERNEL);

	WARN_ON(old);



	spin_lock(&ctx->client->ctx_lock);

	list_add_tail_rcu(&ctx->client_link, &ctx->client->ctx_list);

	spin_unlock(&ctx->client->ctx_lock);
@@ -1714,6 +1714,10 @@ static void gem_context_register(struct i915_gem_context *ctx, 
	spin_lock(&i915->gem.contexts.lock);

	list_add_tail(&ctx->link, &i915->gem.contexts.list);

	spin_unlock(&i915->gem.contexts.lock);



	/* And finally expose ourselves to userspace via the idr */

	old = xa_store(&fpriv->context_xa, id, ctx, GFP_KERNEL);

	WARN_ON(old);

}



int i915_gem_context_open(struct drm_i915_private *i915,
@@ -2199,14 +2203,22 @@ finalize_create_context_locked(struct drm_i915_file_private *file_priv, 
	if (IS_ERR(ctx))

		return ctx;



	/*

	 * One for the xarray and one for the caller.  We need to grab

	 * the reference *prior* to making the ctx visble to userspace

	 * in gem_context_register(), as at any point after that

	 * userspace can try to race us with another thread destroying

	 * the context under our feet.

	 */

	i915_gem_context_get(ctx);



	gem_context_register(ctx, file_priv, id);



	old = xa_erase(&file_priv->proto_context_xa, id);

	GEM_BUG_ON(old != pc);

	proto_context_close(file_priv->dev_priv, pc);



	/* One for the xarray and one for the caller */

	return i915_gem_context_get(ctx);

	return ctx;

}



struct i915_gem_context *