dt-bindings: spi: Convert spi-mtk-nor to json-schema

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Serial NOR flash controller for MediaTek ARM SoCs

maintainers:

  - Bayi Cheng <bayi.cheng@mediatek.com>

  - Chuanhong Guo <gch981213@gmail.com>

description: |

  This spi controller support single, dual, or quad mode transfer for

  SPI NOR flash. There should be only one spi slave device following

  generic spi bindings. It's not recommended to use this controller

  for devices other than SPI NOR flash due to limited transfer

  capability of this controller.

allOf:

  - $ref: /spi/spi-controller.yaml#

properties:

  compatible:

    oneOf:

      - items:

          - enum:

              - mediatek,mt2701-nor

              - mediatek,mt2712-nor

              - mediatek,mt7622-nor

              - mediatek,mt7623-nor

              - mediatek,mt7629-nor

          - enum:

              - mediatek,mt8173-nor

      - items:

          - const: mediatek,mt8173-nor

  reg:

    maxItems: 1

  interrupts:

    maxItems: 1

  clocks:

    items:

      - description: clock used for spi bus

      - description: clock used for controller

  clock-names:

    items:

      - const: spi

      - const: sf

required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

unevaluatedProperties: false

examples:

  - |

    #include <dt-bindings/clock/mt8173-clk.h>

    soc {

      #address-cells = <2>;

      #size-cells = <2>;

      nor_flash: spi@1100d000 {

        compatible = "mediatek,mt8173-nor";

        reg = <0 0x1100d000 0 0xe0>;

        interrupts = <&spi_flash_irq>;

        clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;

        clock-names = "spi", "sf";

        #address-cells = <1>;

        #size-cells = <0>;

        flash@0 {

          compatible = "jedec,spi-nor";

          reg = <0>;

        };

      };

    };

* Serial NOR flash controller for MediaTek ARM SoCs

Required properties:

- compatible: 	  For mt8173, compatible should be "mediatek,mt8173-nor",

		  and it's the fallback compatible for other Soc.

		  For every other SoC, should contain both the SoC-specific compatible

		  string and "mediatek,mt8173-nor".

		  The possible values are:

		  "mediatek,mt2701-nor", "mediatek,mt8173-nor"

		  "mediatek,mt2712-nor", "mediatek,mt8173-nor"

		  "mediatek,mt7622-nor", "mediatek,mt8173-nor"

		  "mediatek,mt7623-nor", "mediatek,mt8173-nor"

		  "mediatek,mt7629-nor", "mediatek,mt8173-nor"

		  "mediatek,mt8173-nor"

- reg: 		  physical base address and length of the controller's register

- interrupts:	  Interrupt number used by the controller.

- clocks: 	  the phandle of the clocks needed by the nor controller

- clock-names: 	  the names of the clocks

		  the clocks should be named "spi" and "sf". "spi" is used for spi bus,

		  and "sf" is used for controller, these are the clocks witch

		  hardware needs to enabling nor flash and nor flash controller.

		  See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.

- #address-cells: should be <1>

- #size-cells:	  should be <0>

There should be only one spi slave device following generic spi bindings.

It's not recommended to use this controller for devices other than SPI NOR

flash due to limited transfer capability of this controller.

Example:

nor_flash: spi@1100d000 {

	compatible = "mediatek,mt8173-nor";

	reg = <0 0x1100d000 0 0xe0>;

	interrupts = <&spi_flash_irq>;

	clocks = <&pericfg CLK_PERI_SPI>,

		 <&topckgen CLK_TOP_SPINFI_IFR_SEL>;

	clock-names = "spi", "sf";

	#address-cells = <1>;

	#size-cells = <0>;

	flash@0 {

		compatible = "jedec,spi-nor";

		reg = <0>;

	};

};