Commit 03e053b4 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
Browse files

Revert "clk: qcom: regmap-mux: add pipe clk implementation" 



Johan Hovold has pointed out that there are several deficiencies and a
race condition in the regmap_mux_safe ops that were merged. Pipe clocks
has been updated to use newer and simpler clk_regmap_phy_mux_ops. Drop
the regmap-mux-safe clock ops now.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarJohan Hovold <johan+linaro@kernel.org>
Tested-by: default avatarReviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521005343.1429642-4-dmitry.baryshkov@linaro.org
parent 720e14f3

drivers/clk/qcom/clk-regmap-mux.c

+0 −78
Original line number Diff line number Diff line
@@ -49,87 +49,9 @@ static int mux_set_parent(struct clk_hw *hw, u8 index) 
	return regmap_update_bits(clkr->regmap, mux->reg, mask, val);

}



static u8 mux_safe_get_parent(struct clk_hw *hw)

{

	struct clk_regmap_mux *mux = to_clk_regmap_mux(hw);

	unsigned int val;



	if (clk_hw_is_enabled(hw))

		return mux_get_parent(hw);



	val = mux->stored_parent_cfg;



	if (mux->parent_map)

		return qcom_find_cfg_index(hw, mux->parent_map, val);



	return val;

}



static int mux_safe_set_parent(struct clk_hw *hw, u8 index)

{

	struct clk_regmap_mux *mux = to_clk_regmap_mux(hw);



	if (clk_hw_is_enabled(hw))

		return mux_set_parent(hw, index);



	if (mux->parent_map)

		index = mux->parent_map[index].cfg;



	mux->stored_parent_cfg = index;



	return 0;

}



static void mux_safe_disable(struct clk_hw *hw)

{

	struct clk_regmap_mux *mux = to_clk_regmap_mux(hw);

	struct clk_regmap *clkr = to_clk_regmap(hw);

	unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift);

	unsigned int val;



	regmap_read(clkr->regmap, mux->reg, &val);



	mux->stored_parent_cfg = (val & mask) >> mux->shift;



	val = mux->safe_src_parent;

	if (mux->parent_map) {

		int index = qcom_find_src_index(hw, mux->parent_map, val);



		if (WARN_ON(index < 0))

			return;



		val = mux->parent_map[index].cfg;

	}

	val <<= mux->shift;



	regmap_update_bits(clkr->regmap, mux->reg, mask, val);

}



static int mux_safe_enable(struct clk_hw *hw)

{

	struct clk_regmap_mux *mux = to_clk_regmap_mux(hw);

	struct clk_regmap *clkr = to_clk_regmap(hw);

	unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift);

	unsigned int val;



	val = mux->stored_parent_cfg;

	val <<= mux->shift;



	return regmap_update_bits(clkr->regmap, mux->reg, mask, val);

}



const struct clk_ops clk_regmap_mux_closest_ops = {

	.get_parent = mux_get_parent,

	.set_parent = mux_set_parent,

	.determine_rate = __clk_mux_determine_rate_closest,

};

EXPORT_SYMBOL_GPL(clk_regmap_mux_closest_ops);
 


const struct clk_ops clk_regmap_mux_safe_ops = {

	.enable = mux_safe_enable,

	.disable = mux_safe_disable,

	.get_parent = mux_safe_get_parent,

	.set_parent = mux_safe_set_parent,

	.determine_rate = __clk_mux_determine_rate_closest,

};

EXPORT_SYMBOL_GPL(clk_regmap_mux_safe_ops);

drivers/clk/qcom/clk-regmap-mux.h

+0 −3
Original line number Diff line number Diff line
@@ -14,13 +14,10 @@ struct clk_regmap_mux { 
	u32			reg;

	u32			shift;

	u32			width;

	u8			safe_src_parent;

	u8			stored_parent_cfg;

	const struct parent_map	*parent_map;

	struct clk_regmap	clkr;

};



extern const struct clk_ops clk_regmap_mux_closest_ops;

extern const struct clk_ops clk_regmap_mux_safe_ops;



#endif