Commit 03d701c2 authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/32s: Don't use SPRN_SPRG_PGDIR in hash_page 



SPRN_SPRG_PGDIR is there mainly to speedup SW TLB miss handlers
for powerpc 603.

We need to free SPRN_SPRG2 to reduce the mess with CONFIG_VMAP_STACK.

In hash_page(), reading PGDIR from thread_struct will be in the noise
performance wise.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/4adca19b7120cdf619956768ed09e74fc6a558f3.1606285014.git.christophe.leroy@csgroup.eu
parent 7b107a71

arch/powerpc/mm/book3s32/hash_low.S

+5 −4
Original line number Diff line number Diff line
@@ -65,13 +65,14 @@ _GLOBAL(hash_page) 
	/* Get PTE (linux-style) and check access */

	lis	r0, TASK_SIZE@h		/* check if kernel address */

	cmplw	0,r4,r0

	mfspr	r8,SPRN_SPRG_THREAD	/* current task's THREAD (phys) */

	ori	r3,r3,_PAGE_USER|_PAGE_PRESENT /* test low addresses as user */

	mfspr	r5, SPRN_SPRG_PGDIR	/* phys page-table root */

	lwz	r5,PGDIR(r8)		/* virt page-table root */

	blt+	112f			/* assume user more likely */

	lis	r5, (swapper_pg_dir - PAGE_OFFSET)@ha	/* if kernel address, use */

	addi	r5 ,r5 ,(swapper_pg_dir - PAGE_OFFSET)@l	/* kernel page table */

	lis	r5,swapper_pg_dir@ha	/* if kernel address, use */

	addi	r5,r5,swapper_pg_dir@l	/* kernel page table */

	rlwimi	r3,r9,32-12,29,29	/* MSR_PR -> _PAGE_USER */

112:

112:	tophys(r5, r5)

#ifndef CONFIG_PTE_64BIT

	rlwimi	r5,r4,12,20,29		/* insert top 10 bits of address */

	lwz	r8,0(r5)		/* get pmd entry */