Commit 03bdc388 authored by Hou Zhiqiang's avatar Hou Zhiqiang Committed by Lorenzo Pieralisi
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PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver 



Modularize the Mobiveil PCIe host driver according to the abstraction of
Root Complex and Endpoint and move it into a new directory in order to
make it easier to reuse the driver functions to add new host drivers for
systems integrating the Mobiveil PCIe GPEX IP.

Signed-off-by: default avatarHou Zhiqiang <Zhiqiang.Hou@nxp.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: default avatarAndrew Murray <andrew.murray@arm.com>
parent 39e3a03e

MAINTAINERS

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@@ -12794,7 +12794,7 @@ M: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> 
L:	linux-pci@vger.kernel.org

S:	Supported

F:	Documentation/devicetree/bindings/pci/mobiveil-pcie.txt

F:	drivers/pci/controller/pcie-mobiveil.c

F:	drivers/pci/controller/mobiveil/pcie-mobiveil*









PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support)









M:	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
































drivers/pci/controller/Kconfig



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@@ -213,16 +213,6 @@ config PCIE_MEDIATEK







	  Say Y here if you want to enable PCIe controller support on









	  MediaTek SoCs.



















config PCIE_MOBIVEIL









	bool "Mobiveil AXI PCIe controller"









	depends on ARCH_ZYNQMP || COMPILE_TEST









	depends on OF









	depends on PCI_MSI_IRQ_DOMAIN









	help









	  Say Y here if you want to enable support for the Mobiveil AXI PCIe









	  Soft IP. It has up to 8 outbound and inbound windows









	  for address translation and it is a PCIe Gen4 IP.



















config PCIE_TANGO_SMP8759









	bool "Tango SMP8759 PCIe controller (DANGEROUS)"









	depends on ARCH_TANGO && PCI_MSI && OF








@@ -269,5 +259,6 @@ config PCI_HYPERV_INTERFACE







	  have a common interface with the Hyper-V PCI frontend driver.



















source "drivers/pci/controller/dwc/Kconfig"









source "drivers/pci/controller/mobiveil/Kconfig"









source "drivers/pci/controller/cadence/Kconfig"









endmenu
























drivers/pci/controller/Makefile



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@@ -25,12 +25,12 @@ obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o







obj-$(CONFIG_PCIE_ROCKCHIP_EP) += pcie-rockchip-ep.o









obj-$(CONFIG_PCIE_ROCKCHIP_HOST) += pcie-rockchip-host.o









obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o









obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o









obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o









obj-$(CONFIG_VMD) += vmd.o









obj-$(CONFIG_PCIE_BRCMSTB) += pcie-brcmstb.o









# pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW









obj-y				+= dwc/









obj-y				+= mobiveil/





























# The following drivers are for devices that use the generic ACPI
































drivers/pci/controller/mobiveil/Kconfig
0 → 100644



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# SPDX-License-Identifier: GPL-2.0



















menu "Mobiveil PCIe Core Support"









	depends on PCI



















config PCIE_MOBIVEIL









	bool



















config PCIE_MOBIVEIL_HOST









	bool









	depends on PCI_MSI_IRQ_DOMAIN









	select PCIE_MOBIVEIL



















config PCIE_MOBIVEIL_PLAT









	bool "Mobiveil AXI PCIe controller"









	depends on ARCH_ZYNQMP || COMPILE_TEST









	depends on OF









	select PCIE_MOBIVEIL_HOST









	help









	  Say Y here if you want to enable support for the Mobiveil AXI PCIe









	  Soft IP. It has up to 8 outbound and inbound windows









	  for address translation and it is a PCIe Gen4 IP.



















endmenu
























drivers/pci/controller/mobiveil/Makefile
0 → 100644



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# SPDX-License-Identifier: GPL-2.0









obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o









obj-$(CONFIG_PCIE_MOBIVEIL_HOST) += pcie-mobiveil-host.o









obj-$(CONFIG_PCIE_MOBIVEIL_PLAT) += pcie-mobiveil-plat.o