Commit 02fc996d authored by Emily Deng's avatar Emily Deng Committed by Alex Deucher
Browse files

drm/amdgpu/vcn: Fix the register setting for vcn1 



Correct the code error for setting register UVD_GFX10_ADDR_CONFIG.
Need to use inst_idx, or it only will set VCN0.

Signed-off-by: default avatarEmily Deng <Emily.Deng@amd.com>
Reviewed-by: default avatarJames Zhu <James.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent c9fbf643

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

+2 −2
Original line number Diff line number Diff line
@@ -575,8 +575,8 @@ static void vcn_v3_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx 
			AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_fw_shared)), 0, indirect);



	/* VCN global tiling registers */

	WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET(

		UVD, 0, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect);

	WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET(

		UVD, inst_idx, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect);

}



static void vcn_v3_0_disable_static_power_gating(struct amdgpu_device *adev, int inst)